Bus based parallel computers: A viable way for massive parallelism

  • A. Ferreira
  • A. Goldman vel Lejbman
  • S. W. Song
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 817)

Abstract

In most distributed memory MIMD multiprocessors, processors are connected by a point-to-point interconnection network. Since interprocessor communication frequently constitutes serious bottlenecks, several architectures were proposed that enhance point-to-point topologies with the help of multiple bus systems so as to improve the communication efficiency. In this paper we study global communication on parallel architectures where the communication means are constituted solely by busses. We focus on the hyperpath and the hypergrid architectures, which are the bus-based versions of the well used point-to-point linear and grid interconnection networks. Using (hyper) graph theoretic concepts in order to model inter-processor communication in such networks, we developed a new tool called simplification in order to give extremely efficient algorithms for gossiping (all-to-all or total exchange communications).

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Copyright information

© Springer-Verlag 1994

Authors and Affiliations

  • A. Ferreira
    • 1
  • A. Goldman vel Lejbman
    • 2
  • S. W. Song
    • 2
  1. 1.CNRS-Laboratoire de l'Informatique du Parallélismeécole Normale Supérieure de LyonLyon Cédex 07France
  2. 2.Department of Computer Science, Institute of Mathematics and StatisticsUniversity of SÃo PauloSÃo Paulo, SPBrazil

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