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Verification of a multiplier: 64 bits and beyond

  • R. P. Kurshan
  • Leslie Lamport
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 697)

Abstract

Verifying a 64-bit multiplier has a computational complexity that puts it beyond the grasp of current finite-state algorithms, including those based upon homomorphic reduction, the induction principle, and bdd fixed-point algorithms. Theorem proving, while not bound by the same computational constraints, may not be feasible for routinely coping with the complex, low-level details of a real multiplier. We show how to verify such a multiplier by applying COSPAN, a model-checking algorithm, to verify local properties of the complex low-level circuit, and using TLP, a theorem prover based on the Temporal Logic of Actions, to prove that these properties imply the correctness of the multiplier. Both verification steps are automated, and we plan to mechanize the translation between the languages of TLP and COSPAN.

Keywords

Model Check Temporal Logic Theorem Prove Decomposition Theorem Safety Property 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1993

Authors and Affiliations

  • R. P. Kurshan
    • 1
  • Leslie Lamport
    • 2
  1. 1.AT&T Bell LabsMurray Hill
  2. 2.Digital Equipment CorporationPalo Alto

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