New systolic architectures for cyclic code encoding
In this paper, we develop three systolic architectures for the encoding of cyclic codes. Our discussion is limited to codes over the finite field GF(2m). Contrary to those published in the litterature, our encoders use the check polynomial H(x) of the code. For an (n,k) cyclic code, the first and second encoder consist respectively of (n-k) and k cells arranged into a serial-in serial-out one-dimensional systolic array. The second encoder performs encoding with interleaving. The third encoder consists of k.(n-k) cells arranged into a parallel-in parallel-out two-dimensional systolic array. It needs less average time per word encoding than the two other encoders. In all the cases, the architectures are simple, regular and possess the properties of concurrency and modularity.
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