Using MTBDDs for Composition and Model Checking of Real-Time Systems

  • Jürgen Ruf
  • Thomas Kropf
Conference paper
First Online:
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1522)

Abstract

In this paper we show that multi-terminal BDDs (MTBDDs) are well suited to represent and manipulate interval based timed transition systems. For many timed verification tasks efficient MTBDD-based algorithms are presented. This comprises the composition of timed structures based on symbolic techniques, heuristics for state variable minimization, and a symbolic model checking algorithm. Experimental results show that in many cases our approach outperforms standard unit-delay approaches and corresponding timed automata models.

Keywords

Model Check Transition Relation Atomic Proposition Symbolic Model Check Model Check Algorithm 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
This is a preview of subscription content, log in to check access.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [1]
    M. Bozga, O. Maler, A. Pnueli, and S. Yovine. Some progress in the symbolic verification of timed automata. In O. Grumberg, editor, Conference on Computer Aided Verification (CAV), volume 1254 of Lecture Notes in Computer Science, pages 179–190. Springer Verlag, June 1997.Google Scholar
  2. [2]
    K. Larsen, P. Pettersson, and W. Yi. UPPAAL: Status & developments. In O. Grumberg, editor, Conference on Computer Aided Verification (CAV), volume 1254 of Lecture Notes in Computer Science, pages 456–459. Springer Verlag, June 1997.Google Scholar
  3. [3]
    S. Campos, E. Clarke, and M. Minea. The verus tool: A quantitative approach to the formal verification of real-time systems. In O. Grumberg, editor, Conference on Computer Aided Verification (CAV), volume 1254 of Lecture Notes in Computer Science, pages 452–455. Springer Verlag, June 1997.Google Scholar
  4. [4]
    R. Alur, C. Courcoubetics, and D. Dill. Model Checking for Real-Time Systems. In IEEE Symposium on Logic in Computer Science (LICS), pages 414–425, Washington, D.C., June 1990. IEEE Computer Society Press.Google Scholar
  5. [5]
    J. Burch, E. Clarke, K. McMillan, D. Dill, and L. Hwang. Symbolic Model Checking: 1020 States and Beyond. In IEEE Symposium on Logic in Computer Science (LICS), pages 1–33, Washington, D.C., June 1990. IEEE Computer Society Press.Google Scholar
  6. [6]
    E. Asarin, M. Bozga, A. Kerbrat, O. Maler, M. Pnueli, and A. Rasse. Data structures for the verification of timed automata. In O. Maler, editor, Hybrid and Real-Time Systems, pages 346–360, Grenoble, France, 1997. Springer Verlag, LNCS 1201.CrossRefGoogle Scholar
  7. [7]
    E. Emerson, A. Mok, A. Sistla, and J. Srinivasan. Quantitative Temporal Reasoning. Journal of Real-Time Systems, 4:331–352, 1992.CrossRefGoogle Scholar
  8. [8]
    J. Frö\l, J. Gerlach, and T. Kropf. An Efficient Algorithm for Real-Time Model Checking. In European Design and Test Conference (EDTC), pages 15–21, Paris, France, March 1996. IEEE Computer Society Press (Los Alamitos, California).Google Scholar
  9. [9]
    T. Kropf and J. Ruf. Using MTBDDs for discrete timed symbolic model checking. Technical Report SFB358-C2-5/96, UniversitÄt Karlsruhe, Institut für Rechnerentwurf und Fehlertoleranz, August 1996. ftp://goethe.ira.uka.de/pub/hvg/techreports/SFB358-C2-5-6.ps.gz.
  10. [10]
    J. Ruf and T. Kropf. Symbolic model checking for a discrete clocked temporal logic with intervals. In E. Cerny and D. Probst, editors, Conference on Correct Hardware Design and Verification Methods (CHARME), pages 146–166, Montreal, Canada, October 1997. IFIP WG 10.5, Chapman and Hall.Google Scholar
  11. [11]
    J. Lipson, editor. Elements of Algebra and Algebraic Computing. The Benjamin/ Cummings Publishing Company, Inc., 1981.Google Scholar
  12. [12]
    R. Bryant. Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers, C-35(8):677–691, August 1986.Google Scholar
  13. [13]
    E. Clarke, K. McMillian, X. Zhao, M. Fujita, and J.-Y. Yang. Spectral Transforms for large Boolean Functions with Application to Technologie Mapping. In ACM/IEEE Design Automation Conference (DAC), pages 54–60, Dallas, TX, June 1993.Google Scholar
  14. [14]
    R. Bahar, E. Frohm, C. Gaona, G. Hachtel, E. Macii, A. Pardo, and F. Somenzi. Algebraic Decision Diagrams and Their Applications. In IEEE/ACM International Conference on Computer Aided Design (ICCAD), pages 188–191, Santa Clara, California, November 1993. ACM/IEEE, IEEE Computer Society Press.Google Scholar
  15. [15]
    J. Ruf and T. Kropf. Using MTBDDs for composition and model checking of real-time systems. Technical Report SFB358-C2-1/98, UniversitÄt Karlsruhe, Institut für Rechnerentwurf und Fehlertoleranz, January 1998. ftp://goethe.ira.uka.de/pub/hvg/techreports/SFB358-C2-1-98.ps.gz.
  16. [16]
    S. Graf and H. Saidi. Construction of abstract state graphs with PVS. In O. Grumberg, editor, Conference on Computer Aided Verification (CAV), volume 1254 of Lecture Notes in Computer Scienece, pages 72–83. Springer Verlag, June 1997.Google Scholar
  17. [17]
    K. Schneider and T. Kropf. A unified approach for combining different formalisms for hardware verification. In M. Srivas and A. Camilleri, editors, International Conference on Formal Methods in Computer Aided Design (FMCAD), volume 1166 of Lecture Notes in Computer Science, pages 202–217, Palo Alto, USA, November 1996. Springer Verlag.CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1998

Authors and Affiliations

  • Jürgen Ruf
    • 1
  • Thomas Kropf
    • 1
  1. 1.Institut für Rechnerentwurf und FehlertoleranzUniversitÄt KarlsruheKarlsruheGermany

Personalised recommendations