Proof of Correctness of a Processor with Reorder Buffer Using the Completion Functions Approach

  • Ravi Hosabettu
  • Mandayam Srivas
  • Ganesh Gopalakrishnan
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1633)


The Completion Functions Approach was proposed in [HSG98] as a systematic way to decompose the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function using completion functions, one per unfinished instruction, each of which specifies the effect (on the observables) of completing the instruction. In this paper, we show that this “instruction-centric” view of the completion functions approach leads to an elegant decomposition of the proof for an out-of-order execution processor with a reorder buffer. The proof does not involve the construction of an explicit intermediate abstraction, makes heavy use of strategies based on decision procedures and rewriting, and addresses both safety and liveness issues with a clean separation between them.


Model Check Decision Procedure Proof Obligation Program Counter Instruction Memory 
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Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Ravi Hosabettu
    • 1
  • Mandayam Srivas
    • 2
  • Ganesh Gopalakrishnan
    • 1
  1. 1.Department of Computer ScienceUniversity of UtahSalt Lake City
  2. 2.Computer Science LaboratorySRI InternationalMenlo Park

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