Latency Insensitive Protocols

  • Luca P. Carloni
  • Kenneth L. McMillan
  • Alberto L. Sangiovanni-Vincentelli
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1633)


The theory of latency insensitive design is presented as the foundation of a new correct by construction methodology to design very large digital systems by assembling blocks of Intellectual Properties. Latency insensitive designs are synchronous distributed systems and are realized by assembling functional modules exchanging data on communication channels according to an appropriate protocol. The goal of the protocol is to guarantee that latency insensitive designs composed of functionally correct modules, behave correctly independently of the wire delays. A latency-insensitive protocol is presented that makes use of relay stations buffering signals propagating along long wires. To guarantee correct behavior of the overall system, modules must satisfy weak conditions. The weakness of the conditions makes our method widely applicable.


Clock Cycle Relay Station Lexicographic Order Functional Block Trace Theory 
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Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Luca P. Carloni
    • 1
  • Kenneth L. McMillan
    • 2
  • Alberto L. Sangiovanni-Vincentelli
    • 1
  1. 1.University of California at BerkeleyBerkeleyUSA
  2. 2.Cadence Berkeley LaboratoriesBerkeleyUSA

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