A Cost–Effective Hardware Link Scheduling Algorithm for the Multimedia Router (MMR)

  • M. B. Caminero
  • C. Carrión
  • F. J. Quiles
  • J. Duato
  • S. Yalamanchili
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2094)


The primary objective of the Multimedia Router (MMR) project is the design and implementation of a compact router optimized for multimedia applications. The router is targeted for use in cluster and LAN interconnection networks,whic h offer different constraints and therefore differing router solutions than WANs. One of the key elements in order to achieve these goals is the scheduling algorithm. In a previous paper,the authors have proposed a link/switch scheduling algorithm capable of providing different QoS guarantees to flows as needed. This work focuses on the reduction of the hardware complexity necessary to implement such algorithm. A novel priority algorithm is presented,and its hardware complexity is compared to that of the original proposal.


Communications switching multimedia communications Quality of Service performance evaluation 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • M. B. Caminero
    • 1
  • C. Carrión
    • 1
  • F. J. Quiles
    • 1
  • J. Duato
    • 2
  • S. Yalamanchili
    • 3
  1. 1.Department of Computer ScienceUniversidad de Castilla-La ManchaAlbaceteSpain
  2. 2.Department of Information Systems and Computer ArchitectureUniversidad Politécnica de ValenciaValenciaSpain
  3. 3.School of Electrical and Computer EngineeringGeorgia Institute of TechnologyAtlanta

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