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Optimizing Static Power Dissipation by Functional Units in Superscalar Processors

  • Siddharth Rele
  • Santosh Pande
  • Soner Onder
  • Rajiv Gupta
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2304)

Abstract

We present a novel approach which combines compiler, instruction set, and microarchitecture support to turn off functional units that are idle for long periods of time for reducing static power dissipation by idle functional units using power gating [2],[9]. The compiler identifies program regions in which functional units are expected to be idle and communicates this information to the hardware by issuing directives for turning units off at entry points of idle regions and directives for turning them back on at exits from such regions. The microarchitecture is designed to treat the compiler directives as hints ignoring a pair of off and on directives if they are too close together. The results of experiments show that some of the functional units can be kept off for over 90% of the time at the cost of minimal performance degradation of under 1%.

Keywords

Functional Unit Basic Block Dynamic Power Superscalar Processor Power Block 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Siddharth Rele
    • 1
  • Santosh Pande
    • 2
  • Soner Onder
    • 3
  • Rajiv Gupta
    • 4
  1. 1.Dept of ECECSUniversity of CincinnatiCincinnati
  2. 2.College of Computing, Georgia TechAtlanta
  3. 3.Dept. of Computer ScienceMichigan Tech. Univ.Houghton
  4. 4.Dept. of Computer ScienceThe Univ.of ArizonaTucson

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