Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems

  • A. D. Pimentel
  • S. Polstra
  • F. Terpstra
  • A. W. van Halderen
  • J. E. Coffland
  • L. O. Hertzberger
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2268)


Modern signal processing and multimedia embedded systems increasingly have heterogeneous system architectures. In these systems, programmable processors provide flexibility to support multiple applications, while dedicated hardware blocks provide high performance for time-critical application tasks. The heterogeneity of these embedded systems and the varying demands of their growing number of target applications greatly complicate the system design.

As part of the Artemis project, we are developing a modeling and simulation environment which aims at efficient design space exploration of heterogeneous embedded systems architectures. In this paper, we present an overview of the modeling and simulation methodology used in Artemis. Moreover, using a case study in which we have applied an initial version of our prototype modeling and simulation environment to an M-JPEG encoding application, we illustrate the ease with which alternative candidate architectures can be modeled and evaluated.


Discrete Cosine Transform Architecture Model Design Space Exploration Register Transfer Level Architecture Component 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 3.
    F. Balarin, E. Sentovich, M. Chiodo, P. Giusto, H. Hsieh, B. Tabbara, A. Jurecska, L. Lavagno, C. Passerone, K. Suzuki, and A. Sangiovanni-Vincentelli. Hardware-Software Co-design of Embedded Systems—The POLIS approach. Kluwer Academic Publishers, 1997.Google Scholar
  2. 4.
    M. Bauer and W. Ecker. Hardware/software co-simulation in a VHDL-based test bench approach. In Proc. of the Design Automation Conference, 1997.Google Scholar
  3. 5.
    J.-Y. Brunel, E.A. de Kock, W.M. Kruijtzer, H.J.H.N. Kenter, and W.J.M. Smits. Communication refinement in video systems on chip. In Proc. 7th Int.Workshop on Hardware/Software Codesign, pages 142–146, May 1999.Google Scholar
  4. 6.
    J. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt. Ptolemy: A framework for simulating and prototyping heterogeneous systems. Int. Journal of Computer Simulation, 4:155–182, Apr. 1994.Google Scholar
  5. 7.
    S.L. Coumeri and D.E. Thomas. A simulation environment for hardware-software codesign. In Proceedings of the Int. Conference on Computer Design, pages 58–63, Oct. 1995.Google Scholar
  6. 8.
    M. Dubois, F.A. Briggs, I. Patil, and M. Balakrishnan. Trace-driven simulations of parallel and distributed algorithms in multiprocessors. In Proc. of the Int. Conference in Parallel Processing, pages 909–915, Aug. 1986.Google Scholar
  7. 9.
    G. Kahn. The semantics of a simple language for parallel programming. In Proc. of the IFIP Congress 74, 1974.Google Scholar
  8. 10.
    B. Kienhuis, E.F. Deprettere, K.A. Vissers, and P. van der Wolf. An approach for quantitative analysis of application-specific dataflow architectures. In Proc. of the Int. Conf. on Application-specific Systems, Architectures and Processors, July 1997.Google Scholar
  9. 11.
    R. Klein and S. Leef. New technology links hardware and software simulators. Electronic Engineering Times, June 1996.
  10. 12.
    P. Lieverse, T. Stefanov, P. van der Wolf, and E.F. Deprettere. System level design with spade: an M-JPEG case study. In Proc. of the Int. Conference on Computer Aided Design, November 2001.Google Scholar
  11. 13.
    P. Lieverse, P. van der Wolf, and E.F. Deprettere. A trace transformation technique for communication refinement. In Proc. of the 9th Int. Symposium on Hardware/Software Codesign, pages 134–139, Apr. 2001.Google Scholar
  12. 14.
    P. Lieverse, P. van der Wolf, E.F. Deprettere, and K.A. Vissers. A methodology for architecture exploration of heterogeneous signal processing systems. Journal of VLSI Signal Processing for Signal, Image and Video Technology, 29(3):197–207, November 2001. Special issue on SiPS’99.zbMATHGoogle Scholar
  13. 15.
    H.L. Muller. Simulating computer architectures. PhD thesis, Dept. of Computer Science, Univ. of Amsterdam, Feb. 1993.Google Scholar
  14. 16.
    A.D. Pimentel, P. Lieverse, P. van der Wolf, L.O. Hertzberger, and E.F. Deprettere. Exploring embedded-systems architectures with Artemis. IEEE Computer, 34(11):57–63, Nov. 2001.Google Scholar
  15. 17.
    A.D. Pimentel, P. van der Wolf, E.F. Deprettere, L.O. Hertzberger, J.T.J. van Eijndhoven, and S. Vassiliadis. The Artemis architecture workbench. In Proc. of the Progress workshop on Embedded Systems, pages 53–62, Oct. 2000.Google Scholar
  16. 18.
    J. Rowson. Hardware/software co-simulation. In Proc. of the Design Automation Conference, pages 439–440, 1994.Google Scholar
  17. 19.
    T. Stefanov, P. Lieverse, E.F. Deprettere, and P. van der Wolf. Y-chart based system level performance analysis: an M-JPEG case study. In Proc. of the Progress workshop on Embedded Systems, pages 113–124, Oct. 2000.Google Scholar
  18. 20.
    F. Terpstra, S. Polstra, A.D. Pimentel, and L.O. Hertzberger. Rapid evaluation of instantiations of embedded systems architectures: A case study. In Proc. of the Progress workshop on Embedded Systems, pages 251–260, Oct. 2001.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • A. D. Pimentel
    • 1
  • S. Polstra
    • 1
  • F. Terpstra
    • 1
  • A. W. van Halderen
    • 1
  • J. E. Coffland
    • 1
  • L. O. Hertzberger
    • 1
  1. 1.Dept. of Computer ScienceUniversity of AmsterdamSJ AmsterdamThe Netherlands

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