Floor-Planning via Orderly Spanning Trees

  • Chien-Chih Liao 
  • Lu Hsueh I. 
  • Hsu-Chun Yen 
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2265)

Abstract

Floor-planning is a fundamental step in VLSI chip design. Based upon the concept of orderly spanning trees, we present a simple O(n)-time algorithm to construct a floor-plan for any n-node plane triangulation. In comparison with previous floor-planning algorithms in the literature, our solution is not only simpler in the algorithm itself, but also produces floor-plans which require fewer module types. An equally important aspect of our new algorithm lies in its ability to fit the floor-plan area in a rectangle of size \( (n - 1) \times \left\lfloor {\frac{{2n + 1}} {3}} \right\rfloor \).

References

  1. 1.
    J. Bhasker and S. Sahni. A linear algorithm to check for the existence of a rectangular dual of a planar triangulated graph. Networks, 17:307–317, 1987.MATHCrossRefMathSciNetGoogle Scholar
  2. 2.
    J. Bhasker and S. Sahni. A linear algorithm to find a rectangular dual of a planar triangulated graph. Algorithmica, 3:247–278, 1988.MATHCrossRefMathSciNetGoogle Scholar
  3. 3.
    Y.-T. Chiang, C.-C. Lin, and H.-I. Lu. Orderly spanning trees with applications to graph encoding and graph drawing. In Proceedings of the 12th Annual ACM-SIAM Symposium on Discrete Algorithms, pages 506–515, Washington, D. C., USA, 7–9 Jan. 2001. A revised and extended version can be found at http://xxx.lanl.gov/abs/cs.DS/0102006.
  4. 4.
    R. C.-N. Chuang, A. Garg, X. He, M.-Y. Kao, and H.-I. Lu. Compact encodings of planar graphs via canonical ordering and multiple parentheses. In K. G. Larsen, S. Skyum, and G. Winskel, editors, Proceedings of the 25th International Colloquium on Automata, Languages, and Programming, Lecture Notes in Computer Science 1443, pages 118–129, Aalborg, Denmark, 1998. Springer-Verlag.Google Scholar
  5. 5.
    H. de Fraysseix, P. Ossona de Mendez, and P. Rosenstiehl. On triangle contact graphs. Combinatorics, Probability and Computing, 3:233–246, 1994.MATHCrossRefMathSciNetGoogle Scholar
  6. 6.
    H. de Fraysseix, J. Pach, and R. Pollack. How to draw a planar graph on a grid. Combinatorica, 10:41–51, 1990.MATHCrossRefMathSciNetGoogle Scholar
  7. 7.
    U. Fößmeier, G. Kant, and M. Kaufmann. 2-visibility drawings of planar graphs. In S. North, editor, Proceedings of the 4th International Symposium on Graph Drawing, Lecture Notes in Computer Science 1190, pages 155–168, California, USA, 1996. Springer-Verlag.Google Scholar
  8. 8.
    X. He. On finding the rectangular duals of planar triangular graphs. SIAM Journal on Computing, 22:1218–1226, 1993.MATHCrossRefMathSciNetGoogle Scholar
  9. 9.
    X. He. On floor-plan of plane graphs. SIAM Journal on Computing, 28(6):2150–2167, 1999.MATHCrossRefMathSciNetGoogle Scholar
  10. 10.
    G. Jacobson. Space-efficient static trees and graphs. In Proceedings of the 30th Annual Symposium on Foundations of Computer Science, pages 549–554, Research Triangle Park, North Carolina, 30 Oct.-1 Nov. 1989. IEEE.Google Scholar
  11. 11.
    G. Kant. Drawing planar graphs using the canonical ordering. Algorithmica, 16(1):4–32, 1996.MATHMathSciNetCrossRefGoogle Scholar
  12. 12.
    G. Kant and X. He. Regular edge labeling of 4-connected plane graphs and its applications in graph drawing problems. Theoretical Computer Science, 172(1–2):175–193, 1997.MATHCrossRefMathSciNetGoogle Scholar
  13. 13.
    K. Koźmiński and E. Kinnen. Rectangular duals of planar graphs. Networks, 15(2):145–157, 1985.CrossRefMATHMathSciNetGoogle Scholar
  14. 14.
    K. A. Kózmiński and E. Kinnen. Rectangular dualization and rectangular dissections. IEEE Transactions on Circuits and Systems, 35(11):1401–1416, 1988.CrossRefMATHGoogle Scholar
  15. 15.
    Y. T. Lai and S. M. Leinwand. A theory of rectangular dual graphs. Algorithmica, 5(4):467–483, 1990.MATHCrossRefMathSciNetGoogle Scholar
  16. 16.
    K. Mailing, S. H. Mueller, and W. R. Heller. On finding most optimal rectangular package plans. In Proceedings of the 19th Annual IEEE Design Automation Conference, pages 263–270, 1982.Google Scholar
  17. 17.
    J. I. Munro and V. Raman. Succinct representation of balanced parentheses, static trees and planar graphs. In Proceedings of the 38th Annual Symposium on Foundations of Computer Science, pages 118–126, Miami Beach, Florida, 20-22 Oct. 1997. IEEE.Google Scholar
  18. 18.
    W. Schnyder. Planar graphs and poset dimension. Order, 5:323–343, 1989.MATHCrossRefMathSciNetGoogle Scholar
  19. 19.
    W. Schnyder. Embedding planar graphs on the grid. In Proceedings of the First Annual ACM-SIAM Symposium on Discrete Algorithms, pages 138–148, 1990.Google Scholar
  20. 20.
    S. Tsukiyama, K. Koike, and I. Shirakawa. An algorithm to eliminate all complex triangles in a maximal planar graph for use in VLSI floorplan. In Proceedings of the IEEE International Symposium on Circuits and Systems, pages 321–324, 1986.Google Scholar
  21. 21.
    K.-H. Yeap and M. Sarrafzadeh. Floor-planning by graph dualization: 2-concave rectilinear modules. SIAM Journal on Computing, 22(3):500–526, 1993.MATHCrossRefMathSciNetGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Chien-Chih Liao 
    • 1
  • Lu Hsueh I. 
    • 2
  • Hsu-Chun Yen 
    • 3
  1. 1.Department of Electrical EngineeringNational Taiwan UniversityTaiwan, Republic of China
  2. 2.Academia SinicaInstitute of Information ScienceTaipeiTaiwan, Republic of China
  3. 3.Department of Electrical EngineeringNational Taiwan UniversityTaipeiTaiwan, Republic of China

Personalised recommendations