Instrumentation Set-up for Instruction Level Power Modeling
Energy constraints form an important part of the design specification for processors running embedded applications. For estimating energy dissipation early at the design cycle, accurate power consumption models characterized for the processor are essential. A methodology and the corresponding instrumentation setup for taking current measurements to create high quality instruction level power models, are discussed in this paper. The instantaneous current drawn by the processor is monitored at each clock cycle. A high performance instrumentation setup has been established for the accurate measurement of the processor current, which is based on a current sensing circuit, instead of the conventional solution of a series resistor.
Unable to display preview. Download preview PDF.
- 2.Chaitali Chakrabarti, Dinesh Gaitonde, “Instruction Level Power Model of Microcontrollers”, Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 176–179, 1999.Google Scholar
- 3.Tony D. Givargis, Frank Vahid, Jorg Henkel, “Instruction-based System-level Power Evaluation of System-on-a-chip Peripheral Cores,” in Proc. of IEEE/ACM International Symposium on System Synthesis (ISSS’00), pp. 163–169, September 2000.Google Scholar
- 4.J. T. Russell and M. F. Jacome, “Software Power Estimation and Optimization for High Performance, 32-bit Embedded Processors”, In Proceedings of the International Conference on Computer Design (ICCD’98), October 1998.Google Scholar
- 5.S. Steinke, M. Knauer, L. Wehmeyer, P. Marwedel, “An Accurate and Fine Grain Instruction-Level Energy Model supporting Software Optimizations,” in Proc. of the International Workshop on Power and Timing Modeling, Optimization and Simulation, Yverdon-les-bains, Switzerland (PATMOS’01), September 2001.Google Scholar
- 7.Sheayun Lee, Andreas Ermedahl, Sang Lyul Min, and Naehyuck Chang, “An Accurate Instruction-Level Energy Consumption Model for Embedded RISC Processors,” to appear in In Proceedings of ACM SIGPLAN 1999 Workshop on Languages, Compilers and Tools for Embedded Systems, 2001.Google Scholar
- 9.Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, and Masahiro Fujita, “Power Analysis and Minimization Techniques for Embedded DSP Software”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 123–135, March 1997.Google Scholar
- 10.V. Tiwari, T. C. Lee, “Power Analysis of a 32-bit Embedded Microcontroller,” VLSI Design Journal, Vol. 7, No. 3, 1998.Google Scholar
- 11.SOFLOPO, Low Power Development for Embedded Applications, Esprit project, Deliverable 2.2: Physical measurements, by Thanos Stouraitis, University of Patras, December 1998.Google Scholar
- 12.Xavier Amela, Joan Figueras, Salvador Manich, Josep Rius, Rosa Rodriguez, Antonio Rubio, “ARM Instruction Set Energy Models and Power Simulation Tools (ARM7TDMI),” UPC Internal Report for the IST 10425 VIP (Versatile Integrated Payphone) Project, March 2001.Google Scholar
- 13.Tajana Simunic, Luca Benini and Giovanni De Micheli, “Cycle-Accurate Simulation of Energy Consumption in Embedded Systems,” In Proceedings of the Design Automation Conference (DAC’99), 1999.Google Scholar
- 14.A. Hatzopoulos, S. Siskos and Th. Laopoulos, “Current conveyor based test structures for mixed-signal circuits”, IEE Proceedings— Circuits, Devices and Systems, V.144, N.4, 1997Google Scholar