Pulse-Modulated Vision Chips with Versatile-Interconnected Pixels
This paper proposes and demonstrates novel types of vision chips that utilize pulse trains for image processing. Two types of chips were designed using 1.2 (µm double-metal double-poly CMOS process; one is based on a pulse width modulation (PWM) and the other is based on a pulse frequency modulation (PFM). In both chips the interaction between the pixels were introduced to realize the image pre-processing. The basic experimental and simulation results are shown for the PWM and PFM chips, respectively. Also the comparison between two types is discussed.
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- 1.For example, Koch, C, Li, H.: VISION CHIPS, Implementing Vision Algorithms with Analog VLSI Circuits. IEEE Computer Society Press, CA (1995).Google Scholar
- 2.For example, Mass, W., Bishop, CM. (eds.): Pulsed Neural Networks. The MIT Press, Mass. (1998).Google Scholar
- 4.Nagata, M., Homma, M., Takeda, N., Norie, T., Iwata, A.: A Smart CMOS Imager with Pixel Level PWM Signal Processing. IEEE 1999 Symposium on VLSI Circuits, (1999) 141–144.Google Scholar
- 6.Yang, W.: A Wide-Dynamic-Range, Low-Power Photosensor Array. 1994 IEEE Int’l Solid-State Circuits Conference (1994) 230–231.Google Scholar
- 7.Andoh, F. Nakayama, M., Shimamoto, H., Fujita, Y.: A Digital Pixel Image Sensor with 1-bit ADC and 8-bit Pulse Counter in each Pixel. 1999 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, (1999) 44–47.Google Scholar
- 8.Wong, H.-S.: IEEE Trans. Electron Devices: Technology and Device Scaling Considerations for CMOS Imagers. 43 (1996) 2131–2142.Google Scholar