On Proving Circuit Lower Bounds against the Polynomial-Time Hierarchy: Positive and Negative Results

  • Jin-Yi Cai
  • Osamu Watanabe
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2697)


We consider the problem of proving circuit lower bounds against the polynomial-time hierarchy. We give both positive and negative results. For the positive side, for any fixed integer k > 0, we give an explicit Σ 2 p language, acceptable by a Σ 2 P -machine with running time \( O(n^{k^2 + k} ) \), that requires circuit size > n k. For the negative side, we propose a new stringent notion of relativization, and prove under this stringent relativization that every language in the polynomial-time hierarchy has polynomial circuit size. (For technical details, see also CW03.)


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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Jin-Yi Cai
    • 1
    • 2
  • Osamu Watanabe
    • 1
    • 2
  1. 1.Computer Sci. Dept.Univ. of WisconsinMadisonUSA
  2. 2.Dept. of Math. and Comp. Sci.Tokyo Inst. of TechnologyTokyo

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