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A Binary Multiplier Using RTD Based Threshold Logic Gates

  • P M Kelly
  • C J Thompson
  • T M McGinnity
  • L P Maguire
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2687)

Abstract

A binary multiplier implemented using RTD based threshold logic gates is presented. The circuit demonstrates how small-scale threshold logic gates implementing standard boolean functions can be used to replace conventional boolean gates and achieve reduced circuit complexity. The performance of the gates and multiplier are simulated in HSPICE and the results are presented.

Keywords

Boolean Function Resonant Tunneling Negative Differential Resistance Very Large Scale Integration Resonant Tunnelling Diode 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • P M Kelly
    • 1
  • C J Thompson
    • 1
  • T M McGinnity
    • 1
  • L P Maguire
    • 1
  1. 1.Intelligent Systems Engineering Laboratory, Faculty of InformaticsUniversity of UlsterNorthern IrelandUK

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