From Operational Semantics to Denotational Semantics for Verilog
- Cite this paper as:
- Huibiao Z., Bowen J.P., Jifeng H. (2001) From Operational Semantics to Denotational Semantics for Verilog. In: Margaria T., Melham T. (eds) Correct Hardware Design and Verification Methods. CHARME 2001. Lecture Notes in Computer Science, vol 2144. Springer, Berlin, Heidelberg
This paper presents the derivation of a denotational semantics from an operational semantics for a subset of the widely used hardware description language Verilog. Our aim is to build an equivalence between the operational and denotational semantics. We propose a discrete time semantic model for Verilog. Algebraic laws are also investigated in this paper, with the ultimate aim of providing a unified set of semantic views for Verilog.