High-Radix Design of a Scalable Modular Multiplier

  • Alexandre F. Tenca
  • Georgi Todorov
  • Çetin K. Koç
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2162)

Abstract

This paper describes an algorithm and architecture based on an extension of a scalable radix-2 architecture proposed in a previous work. The algorithm is proven to be correct and the hardware design is discussed in detail. Experimental results are shown to compare a radix-8 implementation with a radix-2 design. The scalable Montgomery multiplier is adjustable to constrained areas yet being able to work on any given precision of the operands. Similar to some systolic implementations, this design avoid the high load on signals that broadcast to several components, making the delay independent of operand’s precision.

Key Words

modular multiplier montgomery multiplier scalable architecture high-radix 

References

  1. 1.
    A. Bernal and A. Guyot. Design of a modular multiplier based on Montgomery’s algorithm. In 13th Conference on Design of Circuits and Integrated Systems, pages 680–685, Madrid, Spain, November 17–20 1998.Google Scholar
  2. 2.
    T. Blum and C. Paar. Montgomery modular exponentiation on reconfigurable hardware. In I. Koren and P. Kornerup, editors, Proceedings, 14th Symposium on Computer Arithmetic, pages 70–77, Bath, England, April 14–16 1999. IEEE Computer Society Press, Los Alamitos, CA.Google Scholar
  3. 3.
    A. D. Booth. A signed binary multiplication technique. Q. J. Mech. Appl. Math., 4(2):236–240, 1951. (Also reprinted in [17], pp. 100–104).MathSciNetMATHCrossRefGoogle Scholar
  4. 4.
    Mentor Graphics Corporation. ASIC Design Kit. http://www.mentor.com/partners/hep/AsicDesignKit/ASICindex.html, 2001.
  5. 5.
    W. Diffie and M. E. Hellman. New directions in cryptography. IEEE Transactions on Information Theory, 22:644–654, November 1976.Google Scholar
  6. 6.
    N. Koblitz. Elliptic curve cryptosystems. Mathematics of Computation, 48(177):203–209, January 1987.Google Scholar
  7. 7.
    Ç. K. Koç, T. Acar, and B. S. Kaliski Jr. Analyzing and comparing Montgomery multiplication algorithms. IEEE Micro, 16(3):26–33, June 1996.Google Scholar
  8. 8.
    P. Kornerup. High-radix modular multiplication for cryptosystems. In E. Swartzlander, Jr., M. J. Irwin, and G. Jullien, editors, Proceedings, 11th Symposium on Computer Arithmetic, pages 277–283, Windsor, Ontario, June 29–July 2 1993. IEEE Computer Society Press, Los Alamitos, CA.CrossRefGoogle Scholar
  9. 9.
    A. J. Menezes, I. F. Blake, X. Gao, R. C. Mullen, S. A. Vanstone, and T. Yaghoobian. Applications of Finite Fields. Kluwer Academic Publishers, Boston, MA, 1993.MATHGoogle Scholar
  10. 10.
    P. L. Montgomery. Modular multiplication without trial division. Mathematics of Computation, 44(170):519–521, April 1985.Google Scholar
  11. 11.
    D. Naccache and D. M’Raïhi. Cryptographic smart cards. IEEE Micro, 16(3):14–24, June 1996.Google Scholar
  12. 12.
    National Institute for Standards and Technology. Digital signature standard (DSS). Federal Register, 56:169, August 1991.Google Scholar
  13. 13.
    H. Orup. Simplifying quotient determination in high-radix modular multiplication. In S. Knowles and W. H. McAllister, editors, Proceedings, 12th Symposium on Computer Arithmetic, pages 193–199, Bath, England, July 19–21 1995. IEEE Computer Society Press, Los Alamitos, CA.CrossRefGoogle Scholar
  14. 14.
    R. L. Rivest, A. Shamir, and L. Adleman. A method for obtaining digital signatures and public-key cryptosystems. Communications of the ACM, 21(2):120–126, February 1978.Google Scholar
  15. 15.
    E. Savaş, A. F. Tenca, and Ç. K. Koç. A scalable and unified multiplier architecture for finite fields gf(p) and gf(2m). In Ç. K. Koç and C. Paar, editors, Cryptographic Hardware and Embedded Systems-CHES 2000, Lecture Notes in Computer Science No. 1965, pages 281–296. Springer, Berlin, Germany, 2000.Google Scholar
  16. 16.
    E. M. Schwarz, R. M. Averil III, and L. J. Sigal. A radix-8 CMOS S/390 multiplier. In T. Lang, J.-M. Muller, and N. Takagi, editors, Proceedings, 13th Symposium on Computer Arithmetic, pages 2–9, Bath, England, July 6–9 1997. IEEE Computer Society Press, Los Alamitos, CA.CrossRefGoogle Scholar
  17. 17.
    E. E. Swartzlander, editor. Computer Arithmetic, volume I. IEEE Computer Society Press, Los Alamitos, CA, 1990.Google Scholar
  18. 18.
    A. F. Tenca and Ç. K. Koç. A scalable architecture for Montgomery multiplication. In Ç. K. Koç and C. Paar, editors, Cryptographic Hardware and Embedded Systems, Lecture Notes in Computer Science No. 1717, pages 94–108. Springer, Berlin, Germany, 1999.CrossRefGoogle Scholar
  19. 19.
    G. Todorov. Asic design, implementation and analysis of a scalable high-radix montgomery multiplier. Master’s thesis, Department of Electrical and Computer Engineering, Oregon State University, December 2000.Google Scholar
  20. 20.
    W. C. Tsai, C. B. Shung, and S. J. Wang. Two systolic architectures for Montgomery multiplication. IEEE Transactions on VLSI Systems, 8(1):103–107, February 2000.Google Scholar
  21. 21.
    C. D. Walter. Space/Time trade-offs for higher radix modular multiplication using repeated addition. IEEE Transactions on Computers, 46(2):139–141, February 1997.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Alexandre F. Tenca
    • 1
  • Georgi Todorov
    • 1
  • Çetin K. Koç
    • 1
  1. 1.Department of Electrical & Computer EngineeringOregon State UniversityCorvallisUSA

Personalised recommendations