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Memory Access Schemes for Configurable Processors

  • Holger Lange
  • Andreas Koch
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1896)

Abstract

This work discusses theMemoryArchitecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configurable caches) and regular accesses (via pre-fetching stream buffers). By hiding specifics behind a consistent abstract interface, it is suitable as a target environment for automatic hardware compilation.

Keywords

Cache Line Memory Architecture Port Interface Datapath Architecture Stream Port 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2000

Authors and Affiliations

  • Holger Lange
    • 1
  • Andreas Koch
    • 1
  1. 1.Tech. Univ. Braunschweig (E.I.S.)BraunschweigGermany

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