Reconfigurable Computing for Speech Recognition: Preliminary Findings
- Cite this paper as:
- Melnikoff S.J., James-Roxby P.B., Quigley S.F., Russell M.J. (2000) Reconfigurable Computing for Speech Recognition: Preliminary Findings. In: Hartenstein R.W., Grünbacher H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg
Continuous real-time speech recognition is a highly computationally-demanding task, but one which can take good advantage of a parallel processing system. To this end, we describe proposals for, and preliminary findings of, research in implementing in programmable logic the decoder part of a speech recognition system. Recognition via Viterbi decoding of Hidden Markov Models is outlined, along with details of current implementations, which aim to exploit properties of the algorithm that could make it well-suited for devices such as FPGAs. The question of how to deal with limited resources, by reconfiguration or otherwise, is also addressed.
Unable to display preview. Download preview PDF.