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The New DRAM Interfaces: SDRAM, RDRAM and Variants

  • Brian Davis
  • Bruce Jacob
  • Trevor Mudge
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1940)

Abstract

For the past two decades, developments in DRAM technology, the primary technology for the main memory of computers, have been directed towards increasing density. As a result 256 M-bit memory chips are now commonplace, and we can expect to see systems shipping in volume with 1 G-bit memory chips within the next two years. Although densities of DRAMs have quadrupled every 3 years, access speed has improved much less dramatically. This is in contrast to developments in processor technology where speeds have doubled nearly every two years. The resulting “memory gap” has been widely commented on. The solution to this gap until recently has been to use caches. In the past several years, DRAM manufacturers have explored new DRAM structures that could help reduce this gap, and reduce the reliance on complex multilevel caches. The new structures have not changed the basic storage array that forms the core of a DRAM; the key changes are in the interfaces. This paper presents an overview of these new DRAM structures.

Keywords

Primary Memory Memory Chip Dram Manufacturer 26th Annual International Symposium Primary Technology 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

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    V. Cuppu, B. Jacob, B. Davis, and T. Mudge. 1999. “A performance comparison of contemporary DRAM architectures.” In Proc. 26th Annual International Symposium on Computer Architecture (ISCA’99), pages 222–233, Atlanta GA.Google Scholar
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    B. Davis, T. Mudge, B. Jacob, V. Cuppu. 2000. “DDR2 and low-latency Variants.” In Proc. Solving the Memory Wall Workshop, held in conjunction with the 27th International Symposium on Computer Architecture (ISCA-2000). Vancouver BC, Canada, June 2000.Google Scholar
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    IBM. 1999. “128Mb Direct RDRAM”. International Business Machines, http:// www.chips.ibm.com/products/memory/19L3262/19L3262.pdf
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    EMS. 2000. “64Mbit — Enhanced SDRAM”. Enhanced Memory Systems, http:// www.edram.com/Library/datasheets/SM2603,2604pb_r1.8.pdf.
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    Fujitsu. 2000. “8 x 256K x 32 BIT Double Data Rate (DDR) FCRAM.” Fujitsu Semiconductor, http://www.fujitsumicro.com/memory/fcram.htm.

Copyright information

© Springer-Verlag Berlin Heidelberg 2000

Authors and Affiliations

  • Brian Davis
    • 1
  • Bruce Jacob
    • 2
  • Trevor Mudge
    • 1
  1. 1.Electrical Engineering & Computer ScienceUniversity of MichiganAnn Arbor
  2. 2.Electrical & Computer EngineeringUniversity of Maryland at College Park

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