TOPPER: An Integrated Environment for Task Allocation and Execution of MPI Applications onto Parallel Architectures
Although the use of parallel computing systems has significantly expanded in the last years, the existence of many processing elements is not fully exploited, due to the interprocessor communication overhead. In this paper we present an integrated software environment for optimizing the performance of parallel programs on multiprocessor architectures. TOPPER can efficiently allocate the tasks of a parallel application on the various nodes of a multiprocessing machine, using several algorithms for task clustering, cluster merging and physical mapping. The programmer outlines the application’s task computation and communication requirements along with the multiprocessor network available in two similar graphs. TOPPER aims to minimize the application’s overall execution time, proposing an efficient task allocation. In the case of MPI programs, TOPPER proves more powerful, since the application is automatically executed on the target machine with the provided task mapping.
KeywordsTask Allocation Parallel Application Task Graph Integrate Environment Processor Graph
Unable to display preview. Download preview PDF.
- Sarkar V.: “Partitioning and Scheduling Parallel Programs for Execution on Multiprocessors”, Cambridge, MA, MIT Press, 1989. 338Google Scholar
- Yang T. and Gerasoulis A.: “PYRROS: Static Task Scheduling and Code Generation for Message Passing Multiprocessors”, Proceedings 6th Conference on Supercomputing (ICS92), pp.428–437, New York, NY, 1992. 336, 338Google Scholar
- El-Rewini H., Lewis T. G. and Ali H.: “Task Scheduling in Parallel and Distributed Systems”, Prentice Hall, 1994. 336Google Scholar
- Liou J. C., Palis. M.A.: “A Comparison of General Approaches to Multiprocessor Scheduling”, Proceedings 11th Parallel Processing Symposium (IPPS’97), pp.152–156, Geneva, Switzerland, 1997. 338Google Scholar
- Koziris N., Romesis M., Papakonstantinou G. and Tsanakas P.: “An Efficient Algorithm for the Physical Mapping of Clustered Task Graphs onto Multiprocessor Architectures”, Proceedings PDP’2000 Conference, pp.406–413, Rhodes, 2000. 337, 339, 343Google Scholar
- Konstantinou D. and Panagiotopoulos A.: Thesis, Department of Electrical & Computer Engineering, NTUA, Athens, 2000. 340, 341Google Scholar