Hardware/Software Partitioning in Verilog

  • Shengchao Qin
  • Jifeng He
  • Zongyan Qiu
  • Naixiao Zhang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2495)


We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We explore a collection of algebraic laws for Verilog programs, from which we design a set of syntax-based algebraic rules to conduct hardware/software partitioning. The co-specification language and the target hardware and software description languages are specific subsets of Verilog, which brings forth our successful verification for the correctness of the partitioning process by algebra of Verilog. Facilitated by Verilog’s rich features, we have also successfully studied hw/sw partitioning for environment-driven systems.


Verilog algebraic laws hardware/software co-design hardware/software partitioning 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Shengchao Qin
    • 1
  • Jifeng He
    • 2
  • Zongyan Qiu
    • 1
  • Naixiao Zhang
    • 1
  1. 1.School of Mathematical SciencesPeking UniversityBeijingChina
  2. 2.International Institute for Software Technology, UNU/IISTUnited Nations UniversityMacau

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