Transactional Locking II

  • Dave Dice
  • Ori Shalev
  • Nir Shavit
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4167)


The transactional memory programming paradigm is gaining momentum as the approach of choice for replacing locks in concurrent programming. This paper introduces the transactional locking II (TL2) algorithm, a software transactional memory (STM) algorithm based on a combination of commit-time locking and a novel global version-clock based validation technique. TL2 improves on state-of-the-art STMs in the following ways: (1) unlike all other STMs it fits seamlessly with any system’s memory life-cycle, including those using malloc/free (2) unlike all other lock-based STMs it efficiently avoids periods of unsafe execution, that is, using its novel version-clock validation, user code is guaranteed to operate only on consistent memory states, and (3) in a sequence of high performance benchmarks, while providing these new properties, it delivered overall performance comparable to (and in many cases better than) that of all former STM algorithms, both lock-based and non-blocking. Perhaps more importantly, on various benchmarks, TL2 delivers performance that is competitive with the best hand-crafted fine-grained concurrent structures. Specifically, it is ten-fold faster than a single lock. We believe these characteristics make TL2 a viable candidate for deployment of transactional memory today, long before hardware transactional support is available.


Memory Location Concurrent Programming Transactional Memory Version Number Java Programming Language 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Herlihy, M., Moss, E.: Transactional memory: Architectural support for lock-free data structures. In: Proceedings of the Twentieth Annual International Symposium on Computer Architecture (1993)Google Scholar
  2. 2.
    Rajwar, R., Herlihy, M., Lai, K.: Virtualizing transactional memory. In: ISCA 2005: Proceedings of the 32nd Annual International Symposium on Computer Architecture, pp. 494–505. IEEE Computer Society, Los Alamitos (2005)Google Scholar
  3. 3.
    Ananian, C.S., Asanovic, K., Kuszmaul, B.C., Leiserson, C.E., Lie, S.: Unbounded transactional memory. In: HPCA 2005: Proceedings of the 11th International Symposium on High-Performance Computer Architecture, Washington, DC, USA, pp. 316–327. IEEE Computer Society, Los Alamitos (2005)Google Scholar
  4. 4.
    Hammond, L., Wong, V., Chen, M., Carlstrom, B.D., Davis, J.D., Hertzberg, B., Prabhu, M.K., Wijaya, H., Kozyrakis, C., Olukotun, K.: Transactional memory coherence and consistency. In: ISCA 2004: Proceedings of the 31st annual international symposium on Computer architecture, Washington, DC, USA, p. 102. IEEE Computer Society, Los Alamitos (2004)CrossRefGoogle Scholar
  5. 5.
    Ennals, R.: Software transactional memory should not be obstruction-free (2005),
  6. 6.
    Harris, T., Fraser, K.: Concurrent programming without locks (2004),
  7. 7.
    Herlihy, M.: The SXM software package (2005),
  8. 8.
    Herlihy, M., Luchangco, V., Moir, M., Scherer, W.: Software transactional memory for dynamic data structures. In: Proceedings of the 22nd Annual ACM Symposium on Principles of Distributed Computing (2003)Google Scholar
  9. 9.
    Marathe, V.J., Scherer III, W.N., Scott, M.L.: Adaptive software transactional memory. In: Fraigniaud, P. (ed.) DISC 2005. LNCS, vol. 3724, pp. 354–368. Springer, Heidelberg (2005)CrossRefGoogle Scholar
  10. 10.
    Moir, M.: HybridTM: Integrating hardware and software transactional memory. Technical Report Archivist 2004-0661, Sun Microsystems Research (2004)Google Scholar
  11. 11.
    Saha, B., Adl-Tabatabai, A.R., Hudson, R.L., Minh, C.C., Hertzberg, B.: A high performance software transactional memory system for a multi-core runtime. In: PPoPP 2006 (to appear, 2006)Google Scholar
  12. 12.
    Shavit, N., Touitou, D.: Software transactional memory. Distributed Computing 10(2), 99–116 (1997)CrossRefGoogle Scholar
  13. 13.
    Welc, A., Jagannathan, S., Hosking, A.L.: Transactional monitors for concurrent objects. In: Odersky, M. (ed.) ECOOP 2004. LNCS, vol. 3086, pp. 518–541. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  14. 14.
    Ananian, C.S., Rinard, M.: Efficient software transactions for object-oriented languages. In: Proceedings of Synchronization and Concurrency in Object-Oriented Languages (SCOOL). ACM, New York (2005)Google Scholar
  15. 15.
    Marathe, V.J., Scherer, W.N., Scott, M.L.: Design tradeoffs in modern software transactional memory systems. In: LCR 2004: Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems, pp. 1–7. ACM Press, New York (2004)CrossRefGoogle Scholar
  16. 16.
    Rajwar, R., Hill, M.: Transactional memory online (2006),
  17. 17.
    Harris, T., Fraser, K.: Language support for lightweight transactions. SIGPLAN Not. 38(11), 388–402 (2003)CrossRefGoogle Scholar
  18. 18.
    Dice, D., Shavit, N.: What really makes transactions fast? In: TRANSACT 2006 ACM Workshop (2006)Google Scholar
  19. 19.
    Afek, Y., Attiya, H., Dolev, D., Gafni, E., Merritt, M., Shavit, N.: Atomic snapshots of shared memory. J. ACM 40(4), 873–890 (1993)zbMATHCrossRefGoogle Scholar
  20. 20.
    Thomasian, A.: Concurrency control: methods, performance, and analysis. ACM Comput. Surv. 30(1), 70–119 (1998)CrossRefGoogle Scholar
  21. 21.
    Riegel, T., Felber, P., Fetzer, C.: A lazy snapshot algorithm with eager validation. In: Dolev, S. (ed.) DISC 2006. LNCS, vol. 4167, pp. 284–298. Springer, Heidelberg (2006)CrossRefGoogle Scholar
  22. 22.
    Agesen, O., Detlefs, D., Garthwaite, A., Knippel, R., Ramakrishna, Y.S., White, D.: An efficient meta-lock for implementing ubiquitous synchronization. ACM SIGPLAN Notices 34(10), 207–222 (1999)CrossRefGoogle Scholar
  23. 23.
    Dice, D.: Implementing fast java monitors with relaxed-locks. In: Java Virtual Machine Research and Technology Symposium, USENIX, pp. 79–90 (2001)Google Scholar
  24. 24.
    Bloom, B.H.: Space/time trade-offs in hash coding with allowable errors. Commun. ACM 13(7), 422–426 (1970)zbMATHCrossRefGoogle Scholar
  25. 25.
    Herlihy, M., Luchangco, V., Moir, M., Scherer III, W.N.: Software transactional memory for dynamic-sized data structures. In: Proceedings of the twenty-second annual symposium on Principles of distributed computing, pp. 92–101. ACM Press, New York (2003)CrossRefGoogle Scholar
  26. 26.
    Cormen, T.H., Leiserson, C.E., Rivest, R.L.: Introduction to Algorithms. MIT Press, Cambridge (1990) COR th 01:1 1.ExzbMATHGoogle Scholar
  27. 27.
    Hanke, S.: The performance of concurrent red-black tree algorithms. In: Vitter, J.S., Zaroliagis, C.D. (eds.) WAE 1999. LNCS, vol. 1668, pp. 286–300. Springer, Heidelberg (1999)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Dave Dice
    • 1
  • Ori Shalev
    • 1
    • 2
  • Nir Shavit
    • 1
  1. 1.Sun Microsystems LaboratoriesBurlingtonUSA
  2. 2.Tel-Aviv UniversityTel-AvivIsrael

Personalised recommendations