Automatic Test Pattern Generation with BOA

  • Tiziana Gravagnoli
  • Fabrizio Ferrandi
  • Pier Luca Lanzi
  • Donatella Sciuto
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4193)

Abstract

We introduce a Bayesian Optimization algorithm (BOA) for the automatic generation of test sequences (ATPG) for digital circuit. We compare our approach, named BOATPG, to the two most known evolutionary approaches to ATPG (GATTO and STRATEGATE) and the currently most promising non-evolutionary approach to ATPG (namely, SPECTRAL ATPG). We show that our simple approach can easily outperform GATTO and performs as good as a more complex evolutionary approach like STRATEGATE. We also show that when BOATPG is coupled with spectral approach for seeding the population of initial test sequences, the resulting hybrid system, SBOATPG, performs better than the plain BOATPG although the improvements over SPECTRAL ATPG are limited.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Abramovici, M., Breuer, M.A., Friedman, A.D.: Digital systems testing and testable design. Computer Science Press (1990)Google Scholar
  2. 2.
    Brglez, F., Bryant, D., Kozminski, K.: Combinational profiles of sequential benchmark circuits. In: Proc. International Symposium on Circuits Systems, pp. 1929–1934 (1989)Google Scholar
  3. 3.
    Cha, C.W., Donath, W.E., Ozguner, F.: 9-v algorithm for test pattern generation of combinational digital circuits. IEEE Transactions on Electronic Computers C-27(3), 193–200 (1978)CrossRefGoogle Scholar
  4. 4.
    Corno, F., Prinetto, P., Rebaudengo, M., Reorda, M.S.: Gatto: A genetic algorithm for automatic test pattern generation for large synchronous sequential sircuits. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 15(8), 991–1000 (1996)CrossRefGoogle Scholar
  5. 5.
    Giani, A., Sheng, S., Hsiao, M.S., Agrawal, V.: Efficient spectral techniques for sequential atpg. In: Proc. IEEE Design Automation and Test in Europe Conf., March 2001, pp. 204–208 (2001)Google Scholar
  6. 6.
    Gravagnoli, T.: Test generation based on probabilistic model building genetic algorithms and spectral analysis. Master’s thesis, Master thesis supervisor: Prof. Pier Luca Lanzi (April 2006)Google Scholar
  7. 7.
    Guo, R., Pomeranz, I., Reddy, S.M.: Procedures for static compaction of test sequences for synchronous sequential circuits based on vector restoration. In: Proc. Design Automation and Test in Europe, pp. 583–587 (1998)Google Scholar
  8. 8.
    Hsiao, M.S., Rudnick, E.M., Patel, J.H.: Sequential circuit test generation using dynamic state traversal. In: Proc. European Design and Test Conference, March 1996, pp. 22–28 (1996)Google Scholar
  9. 9.
    Lee, H.K., Ha, D.S.: Hope: An efficient parallel fault simulator for synchronous sequential circuits. In: Proc. 29th Design Automation Conf., June 1992, pp. 336–340 (1992)Google Scholar
  10. 10.
    Niermann, T., Patel, J.H.: Hitec: A test generator package for sequential circuits. In: Proc. European Design Automation Conf., pp. 214–218 (1991)Google Scholar
  11. 11.
    Ocenasek, J., Kern, S., Hansen, N., Koumoutsakos, P.: A mixed bayesian optimization algorithm with variance adaptation. In: Yao, X., Burke, E.K., Lozano, J.A., Smith, J., Merelo-Guervós, J.J., Bullinaria, J.A., Rowe, J.E., Tiňo, P., Kabán, A., Schwefel, H.-P. (eds.) PPSN 2004. LNCS, vol. 3242, pp. 352–361. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  12. 12.
    Pelikan, M.: Hierarchical Bayesian Optimization Algorithm. Springer, Berlin (2005)MATHGoogle Scholar
  13. 13.
    Pelikan, M., Goldberg, D.E., Sastry, K.: Bayesian optimization algorithm, decision graphs, and occam’s razor. In: Proceedings of the Genetic and Evolutionary Computation Conference, pp. 519–526 (2001); Also IlliGAL Report No. 2000020Google Scholar
  14. 14.
    Pomeranz, I., Reddy, S.M.: Vector restoration based static compaction of test sequences for synchronous sequential circuits. In: Proc. Int. Conf. Computer Design, pp. 360–365 (1997)Google Scholar
  15. 15.
    Roth, J.P.: Diagnosis of automata failures: a calculus and a method. IBM Journal of Research and Development 10(4), 278–291 (1996)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Tiziana Gravagnoli
    • 1
  • Fabrizio Ferrandi
    • 1
  • Pier Luca Lanzi
    • 1
  • Donatella Sciuto
    • 1
  1. 1.Dipartimenti di Elettronica e InformazionePolitecnico di MilanoMilanoItaly

Personalised recommendations