Physical Security Bounds Against Tampering

  • Kerstin Lemke
  • Christof Paar
  • Ahmad-Reza Sadeghi
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3989)

Abstract

We consider the problem of an active adversary physically manipulating computations of a cryptographic device that is implemented in circuitry. Which kind of circuit based security can ever be guaranteed if all computations are vulnerable towards fault injection? In this paper, we define physical security parameters against tampering adversaries. Therefore, we present an adversarial model with a strong focus on fault injection techniques based on radiation and particle impact. Physical implementation strategies to counteract tampering attempts are discussed.

Keywords

Fault Analysis Tamper-Proof Hardware Physical Security Implementation Attack Adversarial Model Fault Prevention Error Detection Fault Detection 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Kerstin Lemke
    • 1
  • Christof Paar
    • 1
  • Ahmad-Reza Sadeghi
    • 1
  1. 1.Horst Görtz Institute for IT SecurityRuhr University BochumBochumGermany

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