Energy-Constrained Prefetching Optimization in Embedded Applications

  • Juan Chen
  • Yong Dong
  • Hui-zhan Yi
  • Xue-jun Yang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3824)


In energy-constrained settings, most low-power compiler optimization techniques take the approach of minimizing the energy consumption while meeting no performance loss. However, it is possible that the available energy budget is not sufficient to meet the optimal performance objective. To limit energy consumption within a given energy budget, energy-constrained optimization approach is more significant. In this paper, we present an energy-constrained prefetching optimization approach through which memory or CPU stalls (caused by too early or too late prefetching) can be reduced so that energy budget is met. Optimal performance objective is achieved under a given energy budget. We evaluate the effectiveness of our energy-constrained prefetching optimization approach through simulations.


software prefetching energy-constrained DVS embedded applications 


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  1. 1.
    Qu, G.: What is the Limit of Energy Saving by Dynamic Voltage Scaling? In: ICCAD, pp. 560–563 (2001)Google Scholar
  2. 2.
    Saputra, H., Kandemir, M., Vijaykrishnan, N., Irwin, M.J., Hu, J.S., Hsu, C.-H., Kremer, U.: Energy-Conscious Compilation Based on Voltage Scaling. In: LCTES 2002-SCOPES 2002, Berlin, Germany, June 19-21 (2002)Google Scholar
  3. 3.
    Xie, F., Martonosi, M., Malik, S.: Compile-Time Dynamic Voltage Scaling Settings: Opportunities and Limits. In: PLDI 2003, San Diego, California, USA, June 9-11 (2003)Google Scholar
  4. 4.
    Kwon, W.-C., Kim, T.: Optimal Voltage Allocation Techniques for Dynamically Variable Voltage Processors. In: DAC 2003, Anaheim, California, USA, June 2-6 (2003)Google Scholar
  5. 5.
    Fan, X., Ellis, C.S., Lebeck, A.R.: The Synergy between Power-aware Memory Systems and Processor Voltage Scaling. In: Falsafi, B., VijayKumar, T.N. (eds.) PACS 2003. LNCS, vol. 3164, pp. 164–179. Springer, Heidelberg (2005)CrossRefGoogle Scholar
  6. 6.
    Mowry, T.C.: Tolerating Latency Through Software-Controlled Data Prefetching. Ph.D. thesis, Stanford University, Computer System Laboratory (March 1994)Google Scholar
  7. 7.
    Chen, S., Gibbons, P.B., Mowry, T.C.: Improving Index Performance through Prefetching. In: Proceedings of the 2001 SIGMOD International Conference on Management of Data, May 2001, pp. 235–246 (2001)Google Scholar
  8. 8.
    Badawy, A.-H., Aggarwal, A., Yeung, D., Tseng, C.-W.: The Efficacy of Software Prefetching and Locality Optimizations on Future Memory Systems. Journal of Instruction-Level Parallelism (June 2004)Google Scholar
  9. 9.
    Bianchini, R., Lim, B.-H.: Evaluating the Performance of Multithreading and Prefetching in Multiprocessors. Journal of Parallel and Distributed Computing (JPDC), special issue on Multithreading for Multiprocessors (August 1996)Google Scholar
  10. 10.
    Hsu, C., Kremer, U., Hsiao, M.: Compiler-Directed Dynamic Voltage/Frequency Scheduling for Energy Reduction in Microprocessors. In: International Symp. on Low Power Electronics and Design (ISLPED), August 2001, pp. 275–278 (2001)Google Scholar
  11. 11.
    Hsu, C.-H.: Compiler-Directed Dynamic Voltage and Frequency Scaling for CPU Power and Energy Reduction. Ph.D. Dissertation. New Brunswick, New Jersey (October 2003)Google Scholar
  12. 12.
    Pouwelse, J., Langendoen, K., Sips, H.: Dynamic Voltage Scaling on a Low-Power Microprocessor. In: Seventh Annual International Conference on Mobile Computing and Networking 2001, pp. 251–259 (2001)Google Scholar
  13. 13.
    Crusoe Processor Model TM5700/TM5900 Data Book,
  14. 14.
    Burger, D., Austin, T.M.: The SimpleScalar Tool Set, Version 2.0. CS TR 1342, University of Wisconsin-Madison (June 1997)Google Scholar
  15. 15.
    Chen, J., Dong, Y., Yang, X.-J.: Energy Optimization for Software Prefetching in Embedded Applications. In: Proceedings of Asia and South Pacific International Conference on Embedded SoCs (ASPICES 2005), Bangalore, India, July 5-8 (2005)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2005

Authors and Affiliations

  • Juan Chen
    • 1
  • Yong Dong
    • 1
  • Hui-zhan Yi
    • 1
  • Xue-jun Yang
    • 1
  1. 1.School of ComputerNational University of Defense TechnologyChangshaChina

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