Arithmetic Data Value Speculation
Value speculation is currently widely used in processor designs to increase the overall number of instructions executed per cycle (IPC). Current methods use sophisticated prediction techniques to speculate on the outcome of branches and execute code accordingly. Speculation can be extended to the approximation of arithmetic values. As arithmetic operations are slow to complete in pipelined execution an increase in overall IPC is possible through accurate arithmetic data value speculation. This paper will focus on integer adder units for the purposes of demonstrating arithmetic data value speculation.
KeywordsArithmetic Unit Subtraction Operation Speculative Execution Branch Prediction Spec Benchmark
Unable to display preview. Download preview PDF.
- 2.Li, A.: An empirical study of the longest carry length in real programs. Master’s thesis, Department of Computer Science, Princeton University (May 2002)Google Scholar
- 3.Koes, D., Chelcea, T., Oneyama, C., Goldstein, S.C.: Adding faster with application specific early termination. School of Computer Science, Carnegie Mellon University, Pittsburgh, USA (January 2005)Google Scholar
- 4.Nowick, S.M., Yun, K.Y., Beerel, P.A., Dooply, A.E.: Speculative completion for the design of high performance asynchronous dynamic adders. In: International Symposium on Advance Research in Asynchronous Circuits and Systems, Eindhoven, The Netherlands, pp. 210–223. IEEE Comput. Soc. Press, Los Alamitos (1997)CrossRefGoogle Scholar
- 6.Burks, A.W., Goldstein, H.H., von Neumann, J.: Preliminiary discussion of the design of an electronic computing instrument. In: Inst. Advanced Study, Princeton, N.J (June 1946)Google Scholar
- 8.Liu, T., Lu, S.-L.: Performance improvement with circuit level speculation. In: Proceedings of the 33rd Annual International Symposium on Microarchitecture, pp. 348–355. IEEE, Los Alamitos (2000)Google Scholar
- 9.Parhami, B.: Computer Arithmetic: Algorithms and Hardware Designs. Oxford University Press, New York (2000)Google Scholar
- 11.Wall, D.W.: Limits of instruction-level parallelism. In: International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, vol. 26(4), pp. 176–188 (1991)Google Scholar
- 12.Hennessey, J.L., Patterson, D.A.: Computer Architecture: A Quantitative Approach. Morgan Kauffman Publishers, San Francisco (2003)Google Scholar