Towards Cache-Optimized Multigrid Using Patch-Adaptive Relaxation

  • Markus Kowarschik
  • Iris Christadler
  • Ulrich Rüde
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3732)


Most of today’s computer architectures employ fast, yet relatively small cache memories in order to mitigate the effects of the constantly widening gap between CPU speed and main memory performance. Efficient execution of numerically intensive programs can only be expected if these hierarchical memory designs are respected. Our work targets the optimization of the cache performance of multigrid codes. The research efforts we will present in this paper first cover transformations that may be automized and then focus on fundamental algorithmic modifications which require careful mathematical analysis. We will present experimental results for the latter.


Multigrid Method Loop Nest Grid Level Multigrid Algorithm Cache Block 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • Markus Kowarschik
    • 1
  • Iris Christadler
    • 1
  • Ulrich Rüde
    • 1
  1. 1.System Simulation Group, Computer Science DepartmentFriedrich-Alexander-University Erlangen-NurembergGermany

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