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Design Verification for Product Line Development

  • Tomoji Kishi
  • Natsuko Noda
  • Takuya Katayama
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3714)

Abstract

Our society is becoming increasingly dependent on embedded software, and its reliability becomes more and more important. Although we can utilize powerful scientific methods such as model checking techniques to develop reliable embedded software, it is expensive to apply these methods to consumer embedded software development. In this paper, we propose an application of model checking techniques for design verification in product line development (PLD). We introduce reusable verification models in which we define variation points, and we show how to define traceability among feature models, design models and verification models. The reuse of verification models in PLD not only enables the systematic design verification of each product but also reduces the cost of applying model checking techniques.

Keywords

Model Check Design Model Event Sequence Environment Model Product Family 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Bosch, J.: Design and Use of Software Architectures. Addison-Wesley, Reading (2000)Google Scholar
  2. 2.
    Clarke, E., Grumberg, O., Peled, D.: Model Checking. MIT, Cambridge (1999)Google Scholar
  3. 3.
    Clements, P., Northrop, L.: Software Product Lines: Practices and Patterns. Addison-Wesley, Reading (2001)Google Scholar
  4. 4.
  5. 5.
    Giannakopoulou, D., Pasareanu, C.S.: Assume-Guarantee Verification of Source Code with Design-Level Assumptions. In: 26th International Conference on Software Engineering, ICSE 2004 (2004)Google Scholar
  6. 6.
    Holzmann, G.J.: The model checker SPIN. IEEE Trans. on Software Engineering 23(5), 279–295 (1997)CrossRefMathSciNetGoogle Scholar
  7. 7.
    Jamie, J., et al.: Test Case Management of Controls Product Line Points of Variability. In: International Workshop on Software Product Line Testing, SPLiT 2004 (2004)Google Scholar
  8. 8.
    Kang, K., et al.: Feature-Oriented Domain Analysis (FODA) Feasibility Study. CUM/SEI-90-TR 21 (1990)Google Scholar
  9. 9.
    Kishi, T., Noda, N.: Aspect-Oriented Context Modeling for Embedded Systems. In: Aspect-Oriented Requirements Engineering and Architecture Design (Early Aspects 2004) (2004)Google Scholar
  10. 10.
    Kishi, T., et al.: Project Report: High Reliable Object-Oriented Embedded Software Design. In: The 2nd IEEE Workshop on Software Technology for Embedded and Ubiquitous Computing Systems, WSTFEUS 2004 (2004)Google Scholar
  11. 11.
    Kishi, T., Noda, N.: Design Testing for Product Line Development based on Test Scenarios. In: International Workshop on Software Product Line Testing, SPLiT 2004 (2004)Google Scholar
  12. 12.
    Lilius, J., Paltor, I.P.: vUML: a Tool for Verifying UML Models. TUCS Technical Report No. 272 (1999)Google Scholar
  13. 13.
    Northrop, L.M.: SEI’s Software Product Line Tenets. IEEE Software 19(4), 32–40 (2002)CrossRefGoogle Scholar
  14. 14.
  15. 15.
    Schäfer, T., Knapp, A., Merz, S.: Model Checking UML State Machines and Collaborations. Electronic Notes in Theoretical Computer Science 55(3) (2001)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2005

Authors and Affiliations

  • Tomoji Kishi
    • 1
  • Natsuko Noda
    • 2
  • Takuya Katayama
    • 1
  1. 1.School of Information ScienceJAIST-Japan Advanced Institute of Science and TechnologyIshikawaJapan
  2. 2.NEC CorporationTokyoJapan

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