Comprehensive Cache Inspection with Hardware Monitors

  • Jie Tao
  • Jürgen Jeitner
  • Carsten Trinitis
  • Wolfgang Karl
  • Josef Weidendorfer
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3606)

Abstract

Computer systems usually rely on hardware counters and software instrumentation to acquire performance information about the cache access behavior. These approaches either provide only limited data or are restricted in their applicability. This paper introduces a novel approach based on a hardware cache monitoring facility that exhibits both the details of traditional software mechanisms and the low–overhead of hardware counters. More specially, the cache monitor can be combined with any location of the memory hierarchy and present a detailed view of the complete memory access behavior of applications. The monitoring concept has been verified using a multiprocessor simulator. Initial experimental results show its feasibility in terms of hardware design and functionality with respect to providing comprehensive performance data.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2005

Authors and Affiliations

  • Jie Tao
    • 1
  • Jürgen Jeitner
    • 2
  • Carsten Trinitis
    • 2
  • Wolfgang Karl
    • 1
  • Josef Weidendorfer
    • 2
  1. 1.Institut für Technische InformatikUniversität Karlsruhe (TH)KarlsruheGermany
  2. 2.Lehrstuhl für Rechnertechnik und RechnerorganisationTechnische Universität MünchenGarchingGermany

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