A SIMD Neural Network Processor for Image Processing
Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of operators naturally maps onto Single Instruction Multiple Data (SIMD) stream parallel processing with distributed memory. This paper proposes a high performance neural network processor whose function can be changed by programming. The proposed processor is based on the SIMD architecture that is optimized for neural network and image processing. The proposed processor supports 24 instructions, and consists of 16 Processing Units (PUs) per chip. Each PU includes 24-bit 2K-word Local Memory (LM) and a Processing Element (PE). The proposed architecture allows multi-chip expansion that minimizes chip-to-chip communication bottleneck. The proposed processor is verified with FPGA implementation and the functionality is verified with character recognition application.
Unable to display preview. Download preview PDF.
- 1.Shiva, S.G.: Pipelined and Parallel Computer Architectures. Harper-Collins, New York (1996)Google Scholar
- 2.Boulet, P., Fortes, J.A.B.: Experimental Evaluation of Affine Schedules for Matrix Multiplication on the MasPar Architecture. In: Proc. lst International Conf. on Massively Parallel Computing Systems, pp. 452–459 (1994)Google Scholar
- 3.Hicklin, J., Demuth, H.: Modeling Neural Networks on the MPP. In: Proc. 2nd Symposium on the Frontiers of Massively Parallel Computation, pp. 39–42 (1988)Google Scholar
- 4.Lam, K.D., Pattnaik, V., Seung-Moon, Y., Torrellas, J., HuangW., K.Y., Zhenzhou, G.: FlexRAM: Toward an Advanced Intelligent Memory System. In: Proceedings of International Conf. on Computer Design 1999, pp. 192–201 (1999)Google Scholar
- 5.Chong, F., Oskin, M., Sherwood, T.: Active pages: A ComPutation Model for Intelhgent Memory. In: Proc 25th Annual International Symposium on ComPuter Architecture, pp. 192–203 (1998)Google Scholar