CMOS Imagers pp 203-221 | Cite as

CMOS Imager Non-Uniformity Correction Using Floating-Gate Adaptation

  • Marc Cohen
  • Gert Cauwenberghs
Chapter

Abstract

Stochastic adaptive algorithms are investigated for on-line correction of spatial non-uniformity in random-access addressable imaging systems. The adaptive architecture is implemented in analog VLSI, and is integrated with the photo sensors on the focal plane. Random sequences of address locations selected with controlled statistics are used to adaptively equalize the intensity distribution at variable spatial scales. Through a logarithmic transformation of system variables, adaptive gain correction is achieved through offset correction in the logarithmic domain. This idea is particularly attractive for compact implementation using translinear floating-gate MOS circuits. Furthermore, the same architecture and random addressing provide for oversampled binary encoding of the image resulting in an equalized intensity histogram. The techniques apply to a variety of solid-state imagers, such as artificial retinas, active pixel sensors and IR sensor arrays. Experimental results confirm gain correction and histogram equalization in a 64×64 pixel adaptive array integrated on a 2.2 mm×2.25 mm chip in 1.5 μm CMOS technology.

Key words

On-line correction non-uniformity correction adaptation equalization floating-gate focal plane CMOS imager analog VLSI 
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Copyright information

© Springer Science + Business Media, Inc. 2004

Authors and Affiliations

  • Marc Cohen
    • 1
  • Gert Cauwenberghs
    • 2
  1. 1.Institute for Systems ResearchUniversity of MarylandCollege ParkUSA
  2. 2.Department of Electrical and Computer EngineeringJohns Hopkins UniversityBaltimoreUSA

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