Application of Property Checking and Underlying Techniques

Infineon’s Circuit Verification Environment
  • Raik Brinkmann
  • Peer Johannsen
  • Klaus Winkelmann
Chapter

Abstract

This article gives an in-depth view of the use of formal property verification at Infineon Technologies AG. We present the method and tool from a user perspective, and also discuss some aspects of its underlying innovations. Finally we present a range of applications high-lighting the strong relevance of property checking for today’s complex design projects.

Keywords

Property checking SAT algorithm circuit verification CVE 
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Copyright information

© Kluwer Academic Publishers 2004

Authors and Affiliations

  • Raik Brinkmann
  • Peer Johannsen
  • Klaus Winkelmann

There are no affiliations available

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