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The design of a delay-insensitive microprocessor: An example of circuit synthesis by program transformation

  • Alain J. Martin
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 408)

Abstract

We have designed the first delay-insensitive microprocessor. It is a 16-bit, RISC-like architecture. The version implemented in 1.6 micron SCMOS runs at 18 MIPS. The chips were found functional on “first silicon.”

The processor was first specified as a sequential program, which was then transformed into a concurrent program so as to pipeline instruction execution. The circuits were derived from the concurrent program by semantics-preserving program transformation.

Keywords

Mutual Exclusion Sequential Program Boolean Expression Memory Unit Data Memory 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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12. References

  1. [1]
    Steven M. Burns and Alain J. Martin, Syntax-directed Translation of Concurrent Programs into Self-timed Circuits. In J. Allen and F. Leighton (ed), Fifth MIT Conference on Advanced Research in VLSI, pp 35–40, MIT Press, 1988.Google Scholar
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    C.A.R. Hoare, Communicating Sequential Processes. Comm. ACM 21,8, pp 666–677, August, 1978.Google Scholar
  3. [3]
    Alain J. Martin, The Design of a Self-timed Circuit for Distributed Mutual Exclusion. In Henry Fuchs (ed), 1985 Chapel Hill Conf. VLSI, Computer Science Press, pp 247–260, 1985.Google Scholar
  4. [4]
    Alain J. Martin, Compiling Communicating Processes into Delay-insensitive VLSI Circuits. Distributed Computing, 1,(4), Springer-Verlag, pp 226–234 1986.Google Scholar
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    Alain J. Martin, A Synthesis Method for Self-timed VLSI Circuits. ICCD 87: 1987 IEEE International Conference on Computer Design, IEEE Computer Society Press, pp 224–229, 1987.Google Scholar
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    Alain J. Martin, Programming in VLSI: From Communicating Processes to Delay-insensitive Circuits. In C.A.R. Hoare (ed), UT Year of Programming Institute on Concurrent Programming, Addison-Wesley, Reading MA, 1989.Google Scholar
  7. [7]
    Alain J. Martin, Steve Burns, Tony Lee, Drazen Borkovic, and Pieter Hazewindus, The Design of an Asynchronus Microprocessor. In C.L. Seitz (ed), Decennial Caltech Conference on VLSI, MIT Press, 1989.Google Scholar
  8. [8]
    Carver Mead and Lynn Conway, Introduction to VLSI Systems, Addison-Wesley, Reading MA, 1980.Google Scholar
  9. [9]
    Charles L. Seitz, System Timing, Chapter 7 in Mead & Conway, Introduction to VLSI Systems, Addison-Wesley, Reading MA, 1980.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1990

Authors and Affiliations

  • Alain J. Martin
    • 1
  1. 1.Department of Computer ScienceCalifornia Institute of TechnologyPasadenaUSA

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