Electrical Yield Electrical Testing Wafer Level Semiconductor Manufacturer Temporary Carrier 
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  1. [1]
    Larry Gilg, “Known Good Die: A Closer Look”, Advanced Packaging, February (2005). Google Scholar
  2. [2]
    Dan Inbar and Mark Murin, “KGD for Flash Memory: Burn-in is Key”, Semiconductor International, August (2004). Google Scholar
  3. [3]
    Larry Gilg and Chris Windsor, “Die Products: Ideal IC Packaging for Demanding Applications”, Electronic Design, December 23, (2002). Google Scholar
  4. [4]
    Larry Gilg, “Die Packaging Trends—Portable Applications”, EP&P, May (2003). Google Scholar
  5. [5]
    J. Secrest, “Known Good Die for Stacked CSP: It’s Not Your Father’s KGD Anymore”, Chip Scale Review, July (2001). Google Scholar
  6. [6]
    L. Gilg, “Wafer-Level vs. Die Burn-In and Test”, EP&P, July (2002). Google Scholar
  7. [7]
    L. Gilg, “Wafer Level Packaging and Test, Technologies and Trends”, Advanced Packaging, November (2002). Google Scholar

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© Springer Science+Business Media LLC 2007

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