Analog Circuit Design pp 151-170 | Cite as
Design Considerations for a Retargetable 12b 200MHz CMOS Current-Steering DAC
Chapter
Abstract
This paper addresses design considerations for high-speed moderate-to-high resolution current-steering digital-to-analogue converters (DACs) in CMOS technology. A design example of a 12b 200MHz DAC in 0.35μm CMOS digital technology is used to illustrate the design techniques, which are then validated through experimental results obtained from the integrated prototypes. Additionally, some techniques used to render the layout of this DAC easily retargetable are also explained.
Keywords
Current Source Decode Scheme Spurious Free Dynamic Range PMOS Switch Local Decoder
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