CMOS Data Converters for Communications pp 139-175 | Cite as

# Analog Functional Blocks

## Summary

In this chapter we have discussed two important analog functional blocks in data converters, the MDAC and the integrator. Both SC and SI circuits were considered. We showed how to calculate the noise and maximum speed of the circuits based on first order models. The maximum speed of the circuits is determined by the bandwidth and the required number of clock phases. The maximum speed normally decreases as the gain of the circuit increases. The thermal noise of the circuits can be referred to the input as a noise voltage. We showed that the noise voltage power for all the circuits is only determined by the capacitors in the circuit.

The results in this chapter will be used in chapter 9 and chapter 11 to investigate the effect of circuit imperfections on pipelined and oversampled sigma-delta converters respectively.

## Keywords

Noise Source Thermal Noise Current Mirror Total Noise Clock Phase## Preview

Unable to display preview. Download preview PDF.

## References

- [1]B. S. Song, S. H. Lee and M. F. Tompsett, ‘A 10-b 15-MHz CMOS Recycling Two-Step A/D Converter’,
*IEEE J. of Solid-State Circuits*, vol. 25, no. 6, pp. 1328–38, Dec. 1990.CrossRefGoogle Scholar - [2]P. Real, D. H. Robertson, C. W. Mangelsdorf, and T. L. Tewksbury, ‘A Wide-Band 10-b 20-Ms/s Pipelined Using Current-Mode Signals’,
*IEEE J. of Solid-State Circuits*, vol. 26, no. 8, pp. 1103–09, Aug. 1991.CrossRefGoogle Scholar - [3]M. Bracey, W. Redman-White, J. Richardson and J. B. Hughes, ‘AFullNyquist 15MS/s 8-b DifferentialSwitched-Current A/DConverter’,
*IEEE J. of Solid-State Circuits*, vol. 31, no. 7, pp. 945–51, July 1996.CrossRefGoogle Scholar - [4]C. Y. Wu, C. C. Chen, J. J. Cho, ‘A CMOS Transistor-Only 8-b 4.5-Ms/s Pipelined Analog-to-Digital Converter Using Fully-Differental Current-Mode Circuit techniques’,
*IEEE J. of Solid-State Circuits*, vol. 30, no. 5, May 1995.Google Scholar - [5]B. E. Jonsson and H. Tenhunen, ‘Low-Voltage, l0bit Switched-Current ADC with 20MHz Input Bandwidth’,
*Electronics Letters*, vol. 34, no. 20, pp. 1904–5, 1st October 1998.CrossRefGoogle Scholar - [6]M. Gustavsson and N. Tan, ‘New Current-Mode Pipeline A/D Converter Architectures’,
*IEEE Intern. Symp. on Circuits and Systems*, ISCAS-97, vol. 1, pp. 417–20, 1997.Google Scholar - [7]J. B. Hughes and K. W. Moulding, S
^{2}I A two-step Approach to Switched-Currents’,*IEEE Intern. Symp. on Circuits and Systems*, ISCAS-93, vol. 2, pp. 1235–8, 1993.Google Scholar - [8]B. Ginetti, P.G. A. Jespers and A. Vandemeulebroecke, ‘A CMOS 13-b Cyclic RSD A/D Converter’,
*IEEE J. of Solid-State Circuits*, vol. 27, no. 7, p. 957–64, July 1992.CrossRefGoogle Scholar - [9]A. N. Karanicolas, H. S. Lee and K. L. Bacrania, ‘A 15-b 1 Msample/s Digitally Self-Calibrated Pipeline ADC’,
*IEEE J. of Solid-State Circuits*, vol. 28, no. 12, pp. 1207–15, Dec. 1993.CrossRefGoogle Scholar - [10]D. A. Johns and K. Martin,
*Analog Integrated Circuit Design*, John Wiley & Sons, Inc. 1997.Google Scholar - [11]C. Toumazou, J. B. Hughes and N. C. Battersby, Eds.:
*Switched-Currents: An Analogue Technique for Digital Technology*, Peter Peregrinus Ltd. 1993.Google Scholar - [12]S. U. Kwak, B. S. Song and K. Bacrania, ‘A 15-b, 5-Msample/s Low-Spurious CMOS ADC’,
*IEEE J. of Solid-State Circuits*, vol. 32, no. 12, pp. 1866–75, Dec. 1997.CrossRefGoogle Scholar - [13]N. Tan,
*Switched-Current Design and Implementation of Oversampling A/D Converters*, Kluwer Academic Publishers 1997.Google Scholar - [14]Y. Geerts, A. M. Merques, M. Steyaert and W. Sansen ‘A 3.3-V, 15-bit, Delta-Sigma ADC with a Signal bandwidth of 1.1 MHz for ADSL Applications’,
*IEEE J. of Solid-State Circuits*, vol. 34, no. 7, pp. 927–36, July 1999.CrossRefGoogle Scholar