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Implementation of CMOS Current-Steering D/A Converters

  • Mikael Gustavsson
  • J. Jacob Wikner
  • Nianxiong Nick Tan
Chapter
Part of the The International Series in Engineering and Computer Science book series (SECS, volume 543)

Summary

In this chapter, we have discussed the design and implementation of current-steering DACs for wideband applications. Different structures have been outlined and for high-speed and high-resolution applications we have found the segmented DAC structure to be most suitable. A key design issue is to find the proper number of bits encode into a thermometer code or if multi-segmented structures are needed. We have shown how the performance of the converter depends on errors in the layout by comparing two similar DACs and highlighted the importance of high frequency poles in the output impedance of the unit current sources. We have shown that it is possible to reach an SFDR of over 75 dBc in a standard 3.3 V digital CMOS process and an SFDR of 65 dBc with a single 1.5-V supply voltage.

Keywords

Current Source Output Impedance Output Resistance Current Switch Transistor Size 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Kluwer Academic Publishers 2002

Authors and Affiliations

  • Mikael Gustavsson
  • J. Jacob Wikner
  • Nianxiong Nick Tan

There are no affiliations available

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