Abstract
A hierarchy of FPGAs, DSPs, and a multiprocessing microprocessor provide a layered high performance computing module which will be used to enhance the performance of a low-earth orbit satellite, FedSat-1, which will be operational in 2001. The high performance computer will provide additional hardware redundancy, on-board data processing, data filtering and data compression for science data, as well as allowing experiments in dynamic reconfigurability of satellite computing hardware in space.
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References
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© 1998 Springer-Verlag Berlin Heidelberg
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Bergmann, N.W., Sutton, P.R. (1998). A high-performance computing module for a low earth orbit satellite using reconfigurable logic. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055272
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DOI: https://doi.org/10.1007/BFb0055272
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