Abstract
To optimize the Discrete Cosine Transform (DCT) in terms of size and to improve the quality of the image in image compression, in this paper, A 2D-DCT using Loeffler algorithm along with Canonical Signed Digit (CSD) and Canonical Sub expression Elimination (CSE) has been proposed. For fast computation 2-DCT/IDCT is executed by using 1D DCT row column method. The performance of the proposed architecture has been evaluated and compared with the other technique.
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Vijay Prakash, A.M., Gurumurthy, K.S.: A novel VLSI architecture for digital image compression using discrete cosine transform and quantization. IJCSNS 10, 175 (2010)
Taher, F., Zaki, A., Elsimary, H.: Design of low power FPGA architecture of image unit for space applications. In: International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE (2016)
Singh, K.K., Pandey, D: Implementation of DCT and IDCT based image compression and decompression on FPGA. In: International Conference on Inventive Systems and Control. IEEE (2017)
Park, J., Roy, K.: A low complexity reconfigurable DCT architecture to trade off image quality for power. Accessed 3 June 2008
Ahmed, N., Natarjan, T., Rao, K.R.: Discrete cosine transform. IEEE Trans. Comput. 23(2), 90–93 (1974)
Wallace, G.K.: The JPEG still picture compression standard. IEEE Trans. Consum. Electron. 38(1), 18–34 (1992)
Wiegand, T., Sullivan, G.J., Bjontegaard, G., Luthra, A.: Overview of the H.264/AVC video coding standard. IEEE Trans. Circuits Syst. Video Technol. 13(7), 560–576 (2003)
Gall, D.L.: MPEG: a video compression standard for multimedia applications. Commun. ACM 34(4), 46–58 (1991)
Hou, H.S.: A fast recursive algorithm for computing the discrete cosine transform. IEEE Trans. Acoust. Speech 35(10), 1455–1461 (1987)
Chen, W.H., Smith, C.H., Fralick, S.C.: A fast computational algorithm for the discrete cosine transform. IEEE Trans. Commun. 25(9), 1004–1009 (1977)
Yu, S., Swartziander, E.E.: DCT implementation with distributed arithmetic. IEEE Trans. Comput. 50(9), 985–991 (2001)
Kim, B., Ziavras, S.G.: Low-power multiplierless DCT for image/video coders. In: Proceedings of IEEE International Symposium on Consumer Electronics, May 2009, pp. 133–136 (2009)
Singh, T.V.P.: Matlab implementation of baseline JPEG image compression using hardware optimized discrete cosine transform. Int. J. Eng. Sci. Inven. 3(8), 47–53 (2014)
August, N.J., Ha, D.S.: Low power design of DCT and IDCT for low bit rate video codecs. IEEE Trans. Multimed. 6(3), 414–422 (2004)
Martisius, I., Birvinskas, D., Jusas, V., Tamosevicius, Z.: A 2-D DCT hardware codec based on Loeffler algorithm. Elektronika IR Elektrotechnika (2011). (ISSN 1392)
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Authors would like to acknowledge Dr. N. Vijayabaskara Chowdry, Correspondent, Madanapalle Institute of Technology and Science, Madanapalle.
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Kajagar, V.V., Ansari, S.M.A., Swaminathan, J.N., Rajasekaran, S. (2019). Quality and Complexity Measurement of 2D-DCT Archietecture Using Loeffler Algorithm Along with CSD and CSE. In: Thampi, S., Marques, O., Krishnan, S., Li, KC., Ciuonzo, D., Kolekar, M. (eds) Advances in Signal Processing and Intelligent Recognition Systems. SIRS 2018. Communications in Computer and Information Science, vol 968. Springer, Singapore. https://doi.org/10.1007/978-981-13-5758-9_30
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DOI: https://doi.org/10.1007/978-981-13-5758-9_30
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