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Level-Wise Scheduling Algorithm for Linearly Extensible Multiprocessor Systems

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Recent Trends in Communication, Computing, and Electronics

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 524))

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Abstract

The valuable treating of parallelism on an interconnection network entails optimizing inconsistent performance indices, such as the reduction of communication and scheduling overheads and also uniform distribution of load among the nodes. In this kind of a system a number of nodes process the numerous jobs concurrently. A novel dynamic scheduling scheme that supports task unbiased structure approach is proposed for a particular class of multiprocessor networks known as linearly extensible multiprocessor networks. The significance of proposed scheduling scheme is remedying the communication overhead, delay in task execution and efficient processor utilization, which ultimately improves the total execution time. The proposed algorithm is implemented on a set of processors known as nodes which are linked through certain interconnection network. In particular, the performance is evaluated for linear type of multiprocessor architectures. In addition, a comparison is also made by implementing standard scheduling algorithm on same architectures with same number of nodes. The metrics used for comparison are Load Imbalance Factor (LIF), which represents the deviation of load among processors after achieving load balancing and execution time. The comparative simulation study shows that the proposed scheme gives better performance in terms of task scheduling and execution time when implemented on various linearly extensible multiprocessor networks.

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Author information

Authors and Affiliations

  1. University Women’s Polytechnic, F/O Engineering & Technology, Aligarh Muslim University, Aligarh, 202002, India

    Abdus Samad & Savita Gautam

Authors
  1. Abdus Samad
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  2. Savita Gautam
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Correspondence to Abdus Samad .

Editor information

Editors and Affiliations

  1. University of Allahabad, Allahabad, India

    Ashish Khare

  2. Indian Institute of Information Technology, Allahabad, Uttar Pradesh, India

    Uma Shankar Tiwary

  3. Oakland University, Rochester, MI, USA

    Ishwar K. Sethi

  4. University of Allahabad, Allahabad, Uttar Pradesh, India

    Nar Singh

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Samad, A., Gautam, S. (2019). Level-Wise Scheduling Algorithm for Linearly Extensible Multiprocessor Systems. In: Khare, A., Tiwary, U., Sethi, I., Singh, N. (eds) Recent Trends in Communication, Computing, and Electronics. Lecture Notes in Electrical Engineering, vol 524. Springer, Singapore. https://doi.org/10.1007/978-981-13-2685-1_50

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  • DOI: https://doi.org/10.1007/978-981-13-2685-1_50

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-13-2684-4

  • Online ISBN: 978-981-13-2685-1

  • eBook Packages: EngineeringEngineering (R0)

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