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A Compressive Sensing Algorithm for Many-Core Architectures

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Part of the book series: Lecture Notes in Computer Science ((LNIP,volume 6454))

Abstract

This paper describes a parallel algorithm for solving the l 1-compressive sensing problem. Its design takes advantage of shared memory, vectorized, parallel and many-core microprocessors such as Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Experiments are conducted on these architectures, showing evidence of the efficiency of our approach.

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Borghi, A., Darbon, J., Peyronnet, S., Chan, T.F., Osher, S. (2010). A Compressive Sensing Algorithm for Many-Core Architectures. In: Bebis, G., et al. Advances in Visual Computing. ISVC 2010. Lecture Notes in Computer Science, vol 6454. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-17274-8_66

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  • DOI: https://doi.org/10.1007/978-3-642-17274-8_66

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-17273-1

  • Online ISBN: 978-3-642-17274-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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