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Relating Fairness and Timing in Process Algebras

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2761))

Abstract

This paper contrasts two important features of parallel system computations: fairness and timing. The study is carried out at specification system level by resorting to a well-known process description language. The language is extended with labels which allow to filter out those process executions that are not (weakly) fair (as in [5,6]), and with upper time bounds for the process activities (as in [2]).

We show that fairness and timing are closely related. Two main results are stated. First, we show that each everlasting (or non-Zeno) timed process execution is fair. Second, we provide a characterization for fair executions of untimed processes in terms of timed process executions. This results in a finite representation of fair executions using regular expressions.

This work was supported by MURST project ‘Sahara: Software Architectures for Heterogeneous Access Networks infrastructures’ and by the Center of Eccellence for Research ‘DEWS: Architectures and Design Methodologies for Embedded Controllers, Wireless Interconnect and System-on-chip’.

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References

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Corradini, F., Di Berardini, M.R., Vogler, W. (2003). Relating Fairness and Timing in Process Algebras. In: Amadio, R., Lugiez, D. (eds) CONCUR 2003 - Concurrency Theory. CONCUR 2003. Lecture Notes in Computer Science, vol 2761. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45187-7_29

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  • DOI: https://doi.org/10.1007/978-3-540-45187-7_29

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40753-9

  • Online ISBN: 978-3-540-45187-7

  • eBook Packages: Springer Book Archive

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