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Approximate Hardware Generation Using Formal Techniques

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Approximate Circuits

Abstract

When it comes to the design of hardware for approximate computing, the exactness requirement between a specification of a circuit and its implementation is relaxed. In this chapter we present two different methods to generate approximate hardware for a given specification and its non-approximated implementation. We use formal techniques to guarantee that bounds for application specific error-metrics hold.

The first method for approximate hardware generation is an exact BDD-based technique, which focuses on single-output functions. Due to the complexity of the problem, scalability is an issue. For this reason, we further present a heuristic approach, which uses Symbolic Computer Algebra to determine the error-metric. This approach is tailored for arithmetic circuits. We apply this method to Ripple-Carry-Adders and compare the results to state-of-the-art handcrafted approximate hardware.

This chapter is based on the conference papers [14, 15]. It was supported in part by the German Research Foundation (DFG) within the project MANIAC (DR 287/29-1), the Reinhart Koselleck project DR 287/23-1, and by the University of Bremen’s graduate school SyDe, funded by the German Excellence Initiative.

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Correspondence to Saman Froehlich .

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Froehlich, S., Große, D., Drechsler, R. (2019). Approximate Hardware Generation Using Formal Techniques. In: Reda, S., Shafique, M. (eds) Approximate Circuits. Springer, Cham. https://doi.org/10.1007/978-3-319-99322-5_8

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  • DOI: https://doi.org/10.1007/978-3-319-99322-5_8

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