Abstract
We have investigated the drain-source current (IDS) instability or drift due to continuous application of gate-source voltage (VGS) and drain-source voltage (VDS). For gate bias stress, both increasing and decreasing behavior of IDS has been observed and analyzed in terms of electron capture and emission respectively. A phenomenological model is used to explain the non-exponential decaying transients. Drain bias effect is small but noticeable in terms of 3% increase in IDS. Apart from bias-stress effect, the degradation of these devices is monitored by measuring the dark transfer characteristics at regular interval of time over a period of 1 month. The threshold voltage (VTh) changes are shown to be correlated with degradation in carrier mobility.
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Acknowledgements
We thank Indo-German Science and Technology Council (IGSTC) and Department of Science & Technology (DST) New Delhi for financial support. We also thank National Centre for Flexible Electronics, IIT Kanpur, India, for providing all kind of support and facilities in carrying out experiments.
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Singh, S., Mohapatra, Y.N. (2019). Degradation and Bias-Stress Effect in TIPS-Pentacene Based Organic Thin Film Transistors with Polymer Dielectric. In: Sharma, R., Rawal, D. (eds) The Physics of Semiconductor Devices. IWPSD 2017. Springer Proceedings in Physics, vol 215. Springer, Cham. https://doi.org/10.1007/978-3-319-97604-4_165
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DOI: https://doi.org/10.1007/978-3-319-97604-4_165
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