Abstract
In this chapter, the potential of the circuit topologies proposed in the work is validated by experimental evaluation of the prototypes. The test configurations and measurements are thoroughly detailed. A final comparison with the state of the art is provided. The description of the designed and fabricated test printed circuit board is described in Sect. 5.1. The practical realization and the corresponding experimental evaluation of the voltage-combiner -biased OTA are described in Sect. 5.2. The practical realization and the corresponding experimental evaluation of the voltage-combiner-biased OTA improved with current starving are described in Sect. 5.3. This chapter positions the developed work within recently published literature, emphasizing the clear contribution in terms of energy efficiency, showing performance beyond the state of the art of single-stage amplifiers, particularly in the context of dynamic amplification.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Online, 2017: https://www.autodesk.com/products/eagle/overview.
Online, 2017: https://www.ti.com/lit/ds/symlink/ths4524.pdf.
R. Baker, “CMOS Circuit Design, Layout and Simulation,” Third Edition, Wiley, 2010. ISBN: 978-0-470-88132-3.
M. Fallah, H. Naimi, “A Novel Low Voltage, Low Power and High Gain Operational Amplifier Using Negative Resistance and Self Cascode Transistors,” in International Journal of Engineering Transactions C: Aspects, Vol. 26, Issue 3, Page(s): 303–308, 2013.
R. Assaad, J. Silva-Martinez, “The Recycling Folded-cascode: A General Enhancement of the Folded-Cascode Amplifier,” in IEEE Journal of Solid-State Circuits, Vol. 44, Issue 9, Page(s): 2535–2542, Sep. 2009. DOI: https://doi.org/10.1109/JSSC.2009.2024819.
M. Ahmed, et al., “An Improved Recycling Folded-cascode Amplifier with Gain-boosting and Phase Margin Enhancement,” in IEEE International Symposium on Circuits and Systems (ISCAS), Page(s): 2473–2476, May 2015. DOI: https://doi.org/10.1109/ISCAS.2015.7169186.
Online, 2017: http://www.analog.com/media/en/training-seminars/tutorials/MT-042.pdf.
M. Figueiredo, et al., “A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency,” in IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol. 58, Issue 7, Page(s): 1591–1603, July, 2011. DOI: https://doi.org/10.1109/TCSI.2011.2150910.
Y. Li, et al., “Transconductance enhancement method for operational transconductance amplifiers,” in Electronics Letters, Vol. 46, Issue 19, Page(s): 1321–1323, Sep. 2010. DOI: https://doi.org/10.1049/el.2010.1575.
S. Zabihian, R. Lofti, “Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique,” in IEEE International Symposium on Circuits and Systems (ISCAS), Page(s): 705–708, May 2007. DOI: https://doi.org/10.1109/ISCAS.2007.377906.
S. Enche, et al., “A CMOS Single-Stage Fully Differential Folded-cascode Amplifier Employing Gain-boosting Technique,” in IEEE International Symposium on Integrated Circuits (ISIC), Page(s): 234–237, Dec. 2011. DOI: https://doi.org/10.1109/ISICir.2011.6131939.
X. Liu, J. McDonald, “Design of Single-Stage Folded-Cascode Gain-boost Amplifier for 14bit 12.5Ms/S Pipelined Analog-to-Digital Converter,” in IEEE International Conference on Software Engineering, Page(s): 622–626, Sep. 2012. DOI: https://doi.org/10.1109/SMElec.2012.6417222.
B. Alizadeh, A. Dadashi, “An Enhanced Folded-cascode Op Amp in 0.18 μm CMOS Process with 67dB Dc Gain,” in IEEE Faible Tension Faible Consommation (FTFC), Page(s): 87–90, May 2011. DOI: https://doi.org/10.1109/FTFC.2011.5948926.
A. Zadeh, “A 100MHz, 1.2V, ±1V Peak-to-Peak Output, Double-Bus Single Ended-to-Differential Switched Capacitor Amplifier for Multi-Column CMOS Image Sensors,” in IEEE International New Circuits and Systems Conference (NEWCAS), Page(s): 1–4, Jun. 2016. DOI: https://doi.org/10.1109/NEWCAS.2016.7604739.
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer International Publishing AG, part of Springer Nature
About this chapter
Cite this chapter
Póvoa, R.F.S., Goes, J.C.d.P., Horta, N.C.G. (2019). Integrated Prototypes and Experimental Evaluation. In: A New Family of CMOS Cascode-Free Amplifiers with High Energy-Efficiency and Improved Gain. Springer, Cham. https://doi.org/10.1007/978-3-319-95207-9_5
Download citation
DOI: https://doi.org/10.1007/978-3-319-95207-9_5
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-95206-2
Online ISBN: 978-3-319-95207-9
eBook Packages: EngineeringEngineering (R0)