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Application-Aware Power Capping Using Nornir

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 12044))

Abstract

Power consumption of IT infrastructure is a major concern for data centre operators. Since data centres power supply is usually dimensioned for an average-case scenario, uncorrelated and simultaneous power spikes in multiple servers could lead to catastrophic effects such as power outages. To avoid such situations, power capping solutions are usually put in place by data centre operators, to control power consumption of individual server and to avoid the datacenter exceeding safe operational limits. However, most power capping solutions rely on Dynamic Voltage and Frequency Scaling (DVFS), which is not always able to guarantee the power cap specified by the user, especially for low power budget values. In this work, we propose a power-capping algorithm that uses a combination of DVFS and Thread Packing. We implement this algorithm in the Nornir framework and we validate it on some real applications by comparing it to the Intel RAPL power capping algorithm and another state of the art power capping algorithm.

This work has been partially supported by Univ. of Pisa PRA_2018_66 DECLware: Declarative methodologies for designing and deploying applications.

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Notes

  1. 1.

    Actually, static power could change when changing the frequency f. However, this is a common approximation and, as we will see in Sect. 5, it does not alter the accuracy of our algorithm.

References

  1. Aldinucci, M., Danelutto, M., Kilpatrick, P., Torquati, M.: Fastflow: high-level and efficient streaming on multi-core. In: Programming Multi-core and Many-core Computing Systems, chap. 13 (2014)

    Google Scholar 

  2. Alessi, F., Thoman, P., Georgakoudis, G., Fahringer, T., Nikolopoulos, D.S.: Application-level energy awareness for OpenMP. In: Terboven, C., de Supinski, B.R., Reble, P., Chapman, B.M., Müller, M.S. (eds.) IWOMP 2015. LNCS, vol. 9342, pp. 219–232. Springer, Cham (2015). https://doi.org/10.1007/978-3-319-24595-9_16

    Chapter  Google Scholar 

  3. Alonso, P., Dolz, M.F., Mayo, R., Quintana-Ortí, E.S.: Modeling power and energy of the task-parallel Cholesky factorization on multicore processors. Comput. Sci. - Res. Dev. 29(2), 105–112 (2012). https://doi.org/10.1007/s00450-012-0227-z

    Article  Google Scholar 

  4. Barroso, L.A., Holzle, U.: The case for energy-proportional computing. Computer 40(12), 33–37 (2007)

    Article  Google Scholar 

  5. Bienia, C., Kumar, S., Singh, J.P., Li, K.: The PARSEC benchmark suite: characterization and architectural implications. In: 17th International Conference on Parallel Architectures and Compilation Techniques (2008)

    Google Scholar 

  6. Burd, T., Pering, T., Stratakos, A., Brodersen, R.: A dynamic voltage scaled microprocessor system. In: ISSCC 2000, pp. 294–295 (2000)

    Google Scholar 

  7. Chandrakasan, A.P., Brodersen, R.W.: Minimizing power consumption in digital CMOS circuits. Proc. IEEE 83(4), 498–523 (1995)

    Article  Google Scholar 

  8. Cochran, R., Hankendi, C., Coskun, A.K., Reda, S.: Pack & Cap: adaptive DVFS and thread packing under power caps. In: Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture, December 2011

    Google Scholar 

  9. Conoci, S., Di Sanzo, P., Ciciani, B., Quaglia, F.: Adaptive performance optimization under power constraint in multi-thread applications with diverse scalability. In: Proceedings of ICPE 2018, pp. 16–27 (2018)

    Google Scholar 

  10. Danelutto, M., De Sensi, D., Torquati, M.: Energy driven adaptivity in stream parallel computations. In: 2015 23rd International Conference on Parallel, Distributed and Network-Based Processing (PDP), Turku, Finland. IEEE, March 2015

    Google Scholar 

  11. David, H., Gorbatov, E., Hanebutte, U.R., Khanna, R., Le, C.: RAPL: memory power estimation and capping. In: 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), pp. 189–194 (2010)

    Google Scholar 

  12. De Sensi, D., De Matteis, T., Danelutto, M.: Simplifying self-adaptive and power-aware computing with Nornir. Future Gener. Comput. Syst. 87, 136–151 (2018)

    Article  Google Scholar 

  13. De Sensi, D., Torquati, M., Danelutto, M.: A reconfiguration algorithm for power-aware parallel applications. ACM TACO 13(4), 1–25 (2016)

    Article  Google Scholar 

  14. De Sensi, D., Torquati, M., Danelutto, M.: Mammut: high-level management of system knobs and sensors. SoftwareX 6, 150–154 (2017)

    Article  Google Scholar 

  15. Fan, X., Weber, W.-D., Barroso, L.A.: Power provisioning for a warehouse-sized computer. SIGARCH Comput. Archit. News 35, 13–23 (2007)

    Article  Google Scholar 

  16. Fu, X., Wang, X., Lefurgy, C.: How much power oversubscription is safe and allowed in data centers. In: Proceedings of the 8th ACM International Conference on Autonomic Computing, pp. 21–30 (2011)

    Google Scholar 

  17. Kim, N.S., et al.: Leakage current: Moore’s law meets static power. Computer 36(12), 68–75 (2003)

    Article  Google Scholar 

  18. Lefurgy, C., Wang, X., Ware, M.: Power capping: a prelude to power shifting. Cluster Comput. 11(2), 183–195 (2008)

    Article  Google Scholar 

  19. Lucente, E.J.: The coming “c” change in data centers (2010). http://www.hpcwire.com/2010/06/15/the_coming_c_change_in_datacenters/

  20. Maiterth, M.: Energy and power aware job scheduling and resource management: global survey – initial analysis. In: 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), pp. 685–693, May 2018

    Google Scholar 

  21. Wang, X., Chen, M., Lefurgy, C., Keller, T.W.: Ship: a scalable hierarchical power control architecture for large-scale data centers. IEEE Trans. Parallel Distrib. Syst. 23(1), 168–176 (2012)

    Article  Google Scholar 

  22. Wu, Q., et al.: Dynamo: facebook’s data center-wide power management system. In: 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), Seoul, Korea, pp. 469–480, June 2016

    Google Scholar 

  23. Zhang, H., Hoffmann, H.: A quantitative evaluation of the RAPL power control system (2014)

    Google Scholar 

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Correspondence to Daniele De Sensi .

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De Sensi, D., Danelutto, M. (2020). Application-Aware Power Capping Using Nornir. In: Wyrzykowski, R., Deelman, E., Dongarra, J., Karczewski, K. (eds) Parallel Processing and Applied Mathematics. PPAM 2019. Lecture Notes in Computer Science(), vol 12044. Springer, Cham. https://doi.org/10.1007/978-3-030-43222-5_17

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  • DOI: https://doi.org/10.1007/978-3-030-43222-5_17

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