Abstract
The synchronous language Lustre and its descendants have long been used to program and model discrete controllers. Recent work shows how to mix discrete and continuous elements in a Lustre-like language called Zélus. The resulting hybrid programs are deterministic and can be simulated with a numerical solver. In this article, we focus on a subset of hybrid programs where continuous behaviors are expressed using timers, nondeterministic guards, and invariants, as in Timed Safety Automata. We adapt a type system for mixing timers and discrete components and propose a source-to-source compilation pass to generate discrete code that, coupled with standard operations on Difference-Bound Matrices, produces symbolic traces that each represent a set of concrete traces.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsNotes
- 1.
- 2.
We thank L. Fribourg for bringing the second reference to our attention.
- 3.
The declaration x = e0 fby e defines a stream x where and for all n > 0, . In other words, it takes its initial value from e0 and thereafter is equal to e delayed by one instant.
- 4.
We thank R. von Hanxleden for his questions which led to this idea.
- 5.
We write [] to denote the empty vector and the empty set of equations; \([x_1, \dots x_n] { \mathop {@}} \,[y_1, \dots , y_n] = [x_1, \dots , x_n, y_1, \dots , y_n]\) to denote the concatenation of two vectors; and x 0 :: [x 1, …, x n] = [x 0, x 1, …, x n] to denote the addition of an element at the beginning of a vector.
- 6.
- 7.
- 8.
References
R. Alur, Formal verification of hybrid systems, in International Conference on Embedded Software (EMSOFT), Taiwan, Oct 2011, pp. 273–278
R. Alur, D.L. Dill, A theory of timed automata. Theor. Comput. Sci. 126(2), 183–235 (1994)
G. Baudart, A Synchronous Approach to Quasi-Periodic Systems. Ph.D. thesis, PSL Research University, Mar 2017
K. Bauer, K. Schneider From synchronous programs to symbolic representations of hybrid systems, in International Conference on Hybrid Systems: Computation and Control (HSCC), Stockholm (ACM Press, Apr 2010), pp. 41–50
G. Behrmann, A. David, K.G. Larsen, J. Håkansson, P. Pettersson, W. Yi, M. Hendriks, Uppaal 4.0, in International Conference on the Quantitative Evaluation of Systems (QEST), Riverside (IEEE Computing Society, Sept 2006), pp. 125–126
J. Bengtsson, Clocks, DBMs and states in timed systems. Ph.D. thesis, Uppsala University (2002)
A. Benveniste, T. Bourke, B. Caillaud, M. Pouzet, Divide and recycle: types and compilation for a hybrid synchronous language, in Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Chicago, Apr 2011, pp. 61–70
A. Benveniste, T. Bourke, B. Caillaud, M. Pouzet, A hybrid synchronous language with hierarchical automata: static typing and translation to synchronous code, in International Conference on Embedded Software (EMSOFT), Taiwan, Oct 2011
B. Berthomieu, M. Menasche, An enumerative approach for analyzing Time Petri Nets, in World Computer Congress (IFIP), Sept 1983, pp. 41–46
V. Bertin, E. Closse, M. Poize, J. Pulou, J. Sifakis, P. Venier, D. Weil, S. Yovine, Taxys = Esterel + Kronos: a tool for verifying real-time properties of embedded systems, in CDC, Orlando (IEEE, Dec 2001), pp. 2875–2880
T. Bourke, M. Pouzet, Zélus: a synchronous language with ODEs, in International Conference on Hybrid Systems: Computation and Control (HSCC), Philadelphia, Apr 2013, pp. 113–118
P. Caspi, The quasi-synchronous approach to distributed control systems. Technical Report CMA/009931, VERIMAG, Crysis Project, May 2000. The Cooking Book
P. Caspi, D. Pilaud, N. Halbwachs, J. Plaice, Lustre: a declarative language for programming synchronous systems, in Symposium on Principles of Programming Languages (POPL), Germany, Jan 1987, pp. 178–188
F. Cassez, K.G. Larsen, The impressive power of stopwatches, in International Conference on Concurrency Theory (CONCUR), State College, Aug 2000, pp. 138–152
A. Champion, A. Mebsout, C. Sticksel, C. Tinelli, The Kind 2 model checker, in International Conference on Computer Aided Verification (CAV), Canada, July 2016, pp. 510–517
D.L. Dill, Timing assumptions and verification of finite-state concurrent systems, in International Workshop on Automatic Verification Methods for Finite State Systems (AVMFSS), France, June 1990, pp. 197–212
D. Garriou, Symbolic simulation of synchronous programs. Electron. Notes Theor. Comput. Sci. 65(5), 11–18 (2002)
N. Halbwachs, Delay analysis in synchronous programs, in International Conference on Computer Aided Verification (CAV), Greece, June 1993, pp. 333–346
T.A. Henzinger, X. Nicollin, J. Sifakis, S. Yovine, Symbolic model checking for real-time systems. Inf. Comput. 111(2), 192–244 (1994)
T. Isenberg, H. Wehrheim, Timed automata verification via IC3 with zones, in International Conference on Formal Methods and Software Engineering (ICFEM). Lecture Notes in Computer Science, vol. 8829, Nov 2014, pp. 203–218
M. Jourdan, F. Maraninchi, A. Olivero, Verifying quantitative real-time properties of synchronous programs, in International Conference on Computer Aided Verification (CAV), Greece, June 1993
R. Kindermann, T. Junttila, I. Niemelä, SMT-based induction methods for timed systems, in International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS). Lecture Notes in Computer Science, vol. 7595, Sept 2012, pp. 171–187
K.G. Larsen, P. Pettersson, Y. Wang, Uppaal in a nutshell. Int. J. Softw. Tools Technol. Transfer 1(1–2), 134–152 (1997)
G. Logothetis, K. Schneider, Extending synchronous languages for generating abstract real-time models, in Design, Automation, and Test in Europe (DATE), France, Mar 2002
C. Mauras, Symbolic simulation of interpreted automata, in International Workshop on Synchronous Programming (SYNCHRON), Germany, Dec 1996
A. Miné, The octagon abstract domain. Higher-Order Symb. Comput. 19(1), 31–100 (2006)
G. Morbé, F. Pigorsch, C. Scholl, Fully symbolic model checking for timed automata, in International Conference on Computer Aided Verification (CAV). Lecture Notes in Computer Science, vol. 6806, July 2011, pp. 616–632
P. Raymond, Y. Roux, E. Jahier, Lutin: a language for specifying and executing reactive scenarios. EURASIP J. Embed. Syst. 2008, 1–11, (2008)
P. Raymond, Y. Roux, E. Jahier, Specifying and executing reactive scenarios with Lutin. Electron. Notes Theor. Comput. Sci. 203(4), 19–34 (2008)
F.W. Vaandrager, A.L. de Groot, Analysis of a biphase mark protocol with Uppaal and PVS. Form. Asp. Comput. 18(4), 433–458 (2006)
F. Wang, Efficient verification of timed automata with BDD-like data structures. Int. J. Softw. Tools Technol. Transfer 6, 77–97 (2004)
S. Yovine, Kronos: a verification tool for real-time systems. Int. J. Softw. Tools Technol. Transfer 1(1), 123–133 (1997)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Switzerland AG
About this chapter
Cite this chapter
Baudart, G., Bourke, T., Pouzet, M. (2019). Symbolic Simulation of Dataflow Synchronous Programs with Timers. In: Große, D., Vinco, S., Patel, H. (eds) Languages, Design Methods, and Tools for Electronic System Design. Lecture Notes in Electrical Engineering, vol 530. Springer, Cham. https://doi.org/10.1007/978-3-030-02215-0_3
Download citation
DOI: https://doi.org/10.1007/978-3-030-02215-0_3
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-02214-3
Online ISBN: 978-3-030-02215-0
eBook Packages: EngineeringEngineering (R0)