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Hardware and a Tool Chain for ADRES

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Reconfigurable Computing: Architectures and Applications (ARC 2006)

Abstract

Until recently, only a compiler and a high-level simulator of the reconfigurable architecture ADRES existed. This paper focuses on the problems that needed to be solved when moving from a software-only view on the architecture to a real hardware implementation, as well as on the verification process of all involved tools.

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References

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© 2006 Springer-Verlag Berlin Heidelberg

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De Sutter, B. et al. (2006). Hardware and a Tool Chain for ADRES. In: Bertels, K., Cardoso, J.M.P., Vassiliadis, S. (eds) Reconfigurable Computing: Architectures and Applications. ARC 2006. Lecture Notes in Computer Science, vol 3985. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11802839_51

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  • DOI: https://doi.org/10.1007/11802839_51

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-36708-6

  • Online ISBN: 978-3-540-36863-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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