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  • Conference proceedings
  • © 2004

Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems

Joint International Conferences on Formal Modeling and Analysis of Timed Systems, FORMATS 2004 and Formal Techniques in Real Time and Fault-Tolerant Systems, FTRTFT 2004, Grenoble, France, September 22-24, 2004, Proceedings

Conference proceedings info: FTRTFT 2004, FORMATS 2004.

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Table of contents (26 papers)

  1. Front Matter

  2. Invited Papers

    1. From Software to Hardware and Back

      • Paul Feautrier
      Pages 1-2
    2. Of Elections and Electrons

      • Peter Y. Ryan
      Pages 3-4
  3. Regular Papers

    1. Formal Verification of an Avionics Sensor Voter Using SCADE

      • Samar Dajani-Brown, Darren Cofer, Amar Bouali
      Pages 5-20
    2. Mixed Delay and Threshold Voters in Critical Real-Time Systems

      • Chiheb Kossentini, Paul Caspi
      Pages 21-35
    3. Towards a Methodological Approach to Specification and Analysis of Dependable Automation Systems

      • Simona Bernardi, Susanna Donatelli, Giovanna Dondossola
      Pages 36-51
    4. On Two-Sided Approximate Model-Checking: Problem Formulation and Solution via Finite Topologies

      • Jennifer M. Davoren, Thomas Moor, R. P. Goré, Vaughan Coulthard, Anil Nerode
      Pages 52-67
    5. On Timed Automata with Input-Determined Guards

      • Deepak D’Souza, Nicolas Tabareau
      Pages 68-83
    6. Decomposing Verification of Timed I/O Automata

      • Dilsun Kırlı Kaynar, Nancy Lynch
      Pages 84-101
    7. Symbolic Model Checking for Simply-Timed Systems

      • Nicolas Markey, Philippe Schnoebelen
      Pages 102-117
    8. Robustness and Implementability of Timed Automata

      • Martin De Wulf, Laurent Doyen, Nicolas Markey, Jean-François Raskin
      Pages 118-133
    9. Real-Time Testing with Timed Automata Testers and Coverage Criteria

      • Moez Krichen, Stavros Tripakis
      Pages 134-151
    10. Monitoring Temporal Properties of Continuous Signals

      • Oded Maler, Dejan Nickovic
      Pages 152-166
    11. A Unified Fault-Tolerance Protocol

      • Paul Miner, Alfons Geser, Lee Pike, Jeffrey Maddalon
      Pages 167-182
    12. Static Fault-Tolerant Real-Time Scheduling with “Pseudo-topological” Orders

      • Cătălin Dima, Alain Girault, Yves Sorel
      Pages 215-230
    13. Bounded Model Checking for Region Automata

      • Fang Yu, Bow-Yaw Wang, Yao-Wen Huang
      Pages 246-262
    14. Some Progress in Satisfiability Checking for Difference Logic

      • Scott Cotton, Eugene Asarin, Oded Maler, Peter Niebert
      Pages 263-276

Other Volumes

  1. Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems

Keywords

  • Analysis
  • Automat
  • Scheduling
  • automata
  • formal specification
  • formal verification
  • model checking
  • modeling
  • petri net
  • verification

Editors and Affiliations

  • VERIMAG - University Joseph Fourier - CNRS - INPG, Gières, France

    Yassine Lakhnech

  • VERIMAG, Centre Equation, Gieres, France

    Sergio Yovine

Bibliographic Information

Buying options

eBook USD 39.99
Price excludes VAT (Canada)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 54.99
Price excludes VAT (Canada)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions