Energy Efficient High Performance Processors

Recent Approaches for Designing Green High Performance Computing

  • Jawad Haj-Yahya
  • Avi Mendelson
  • Yosi Ben Asher
  • Anupam Chattopadhyay

Part of the Computer Architecture and Design Methodologies book series (CADM)

Table of contents

  1. Front Matter
    Pages i-xiv
  2. Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay
    Pages 1-55
  3. Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay
    Pages 57-72
  4. Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay
    Pages 73-105
  5. Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay
    Pages 107-133
  6. Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay
    Pages 135-165

About this book

Introduction

This book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range.
 
The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems.

Keywords

Superscalars Power-Management Energy-Efficiency Power-Estimation Dynamic-Optimizations Green High-Performance-Computing (HPC) Compiler-Directed Power Management Symbolic Execution for Energy Modeling (SEEM) Skylake Based Systems Fine-grain Power Breakdown Firmware Algorithm

Authors and affiliations

  • Jawad Haj-Yahya
    • 1
  • Avi Mendelson
    • 2
  • Yosi Ben Asher
    • 3
  • Anupam Chattopadhyay
    • 4
  1. 1.School of Computer Science and EngineeringNanyang Technological UniversitySingaporeSingapore
  2. 2.Department of Computer ScienceTechnion—Israel Institute of TechnologyHaifaIsrael
  3. 3.Department of Computer ScienceUniversity of HaifaHaifaIsrael
  4. 4.School of Computer Science and EngineeringNanyang Technological UniversitySingaporeSingapore

Bibliographic information

  • DOI https://doi.org/10.1007/978-981-10-8554-3
  • Copyright Information Springer Nature Singapore Pte Ltd. 2018
  • Publisher Name Springer, Singapore
  • eBook Packages Engineering
  • Print ISBN 978-981-10-8553-6
  • Online ISBN 978-981-10-8554-3
  • Series Print ISSN 2367-3478
  • Series Online ISSN 2367-3486
  • About this book